1 | #ifndef __ASM_DOMAIN_H__ |
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2 | #define __ASM_DOMAIN_H__ |
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3 | |
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4 | #include <linux/thread_info.h> |
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5 | #include <asm/tlb.h> |
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6 | #include <asm/vmx_vpd.h> |
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7 | #include <asm/vmmu.h> |
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8 | #include <asm/regionreg.h> |
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9 | #include <public/xen.h> |
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10 | #include <asm/vmx_platform.h> |
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11 | #include <xen/list.h> |
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12 | #include <xen/cpumask.h> |
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13 | #include <asm/fpswa.h> |
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14 | #include <xen/rangeset.h> |
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15 | |
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16 | struct p2m_entry; |
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17 | #ifdef CONFIG_XEN_IA64_TLB_TRACK |
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18 | struct tlb_track; |
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19 | #endif |
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20 | |
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21 | extern void domain_relinquish_resources(struct domain *); |
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22 | struct vcpu; |
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23 | extern void relinquish_vcpu_resources(struct vcpu *v); |
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24 | extern void vcpu_share_privregs_with_guest(struct vcpu *v); |
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25 | extern int vcpu_late_initialise(struct vcpu *v); |
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26 | |
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27 | /* given a current domain metaphysical address, return the physical address */ |
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28 | extern unsigned long translate_domain_mpaddr(unsigned long mpaddr, |
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29 | struct p2m_entry* entry); |
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30 | |
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31 | /* Set shared_info virtual address. */ |
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32 | extern unsigned long domain_set_shared_info_va (unsigned long va); |
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33 | |
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34 | /* Flush cache of domain d. |
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35 | If sync_only is true, only synchronize I&D caches, |
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36 | if false, flush and invalidate caches. */ |
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37 | extern void domain_cache_flush (struct domain *d, int sync_only); |
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38 | |
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39 | /* Control the shadow mode. */ |
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40 | extern int shadow_mode_control(struct domain *d, xen_domctl_shadow_op_t *sc); |
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41 | |
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42 | /* Cleanly crash the current domain with a message. */ |
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43 | extern void panic_domain(struct pt_regs *, const char *, ...) |
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44 | __attribute__ ((noreturn, format (printf, 2, 3))); |
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45 | |
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46 | struct mm_struct { |
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47 | volatile pgd_t * pgd; |
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48 | // atomic_t mm_users; /* How many users with user space? */ |
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49 | }; |
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50 | |
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51 | struct last_vcpu { |
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52 | #define INVALID_VCPU_ID INT_MAX |
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53 | int vcpu_id; |
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54 | #ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK |
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55 | u32 tlbflush_timestamp; |
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56 | #endif |
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57 | } ____cacheline_aligned_in_smp; |
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58 | |
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59 | /* These are data in domain memory for SAL emulator. */ |
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60 | struct xen_sal_data { |
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61 | /* OS boot rendez vous. */ |
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62 | unsigned long boot_rdv_ip; |
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63 | unsigned long boot_rdv_r1; |
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64 | |
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65 | /* There are these for EFI_SET_VIRTUAL_ADDRESS_MAP emulation. */ |
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66 | int efi_virt_mode; /* phys : 0 , virt : 1 */ |
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67 | }; |
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68 | |
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69 | struct arch_domain { |
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70 | struct mm_struct mm; |
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71 | |
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72 | /* Flags. */ |
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73 | union { |
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74 | unsigned long flags; |
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75 | struct { |
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76 | unsigned int is_vti : 1; |
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77 | #ifdef CONFIG_XEN_IA64_PERVCPU_VHPT |
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78 | unsigned int has_pervcpu_vhpt : 1; |
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79 | #endif |
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80 | }; |
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81 | }; |
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82 | |
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83 | /* maximum metaphysical address of conventional memory */ |
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84 | u64 convmem_end; |
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85 | |
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86 | /* Allowed accesses to io ports. */ |
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87 | struct rangeset *ioport_caps; |
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88 | |
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89 | /* There are two ranges of RID for a domain: |
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90 | one big range, used to virtualize domain RID, |
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91 | one small range for internal Xen use (metaphysical). */ |
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92 | /* Big range. */ |
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93 | int starting_rid; /* first RID assigned to domain */ |
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94 | int ending_rid; /* one beyond highest RID assigned to domain */ |
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95 | /* Metaphysical range. */ |
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96 | int starting_mp_rid; |
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97 | int ending_mp_rid; |
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98 | /* RID for metaphysical mode. */ |
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99 | unsigned long metaphysical_rr0; |
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100 | unsigned long metaphysical_rr4; |
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101 | |
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102 | int rid_bits; /* number of virtual rid bits (default: 18) */ |
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103 | int breakimm; /* The imm value for hypercalls. */ |
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104 | |
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105 | struct virtual_platform_def vmx_platform; |
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106 | #define hvm_domain vmx_platform /* platform defs are not vmx specific */ |
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107 | |
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108 | u64 xen_vastart; |
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109 | u64 xen_vaend; |
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110 | u64 shared_info_va; |
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111 | |
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112 | /* Address of SAL emulator data */ |
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113 | struct xen_sal_data *sal_data; |
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114 | |
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115 | /* Address of efi_runtime_services_t (placed in domain memory) */ |
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116 | void *efi_runtime; |
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117 | /* Address of fpswa_interface_t (placed in domain memory) */ |
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118 | void *fpswa_inf; |
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119 | |
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120 | /* Bitmap of shadow dirty bits. |
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121 | Set iff shadow mode is enabled. */ |
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122 | u64 *shadow_bitmap; |
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123 | /* Length (in bits!) of shadow bitmap. */ |
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124 | unsigned long shadow_bitmap_size; |
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125 | /* Number of bits set in bitmap. */ |
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126 | atomic64_t shadow_dirty_count; |
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127 | /* Number of faults. */ |
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128 | atomic64_t shadow_fault_count; |
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129 | |
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130 | struct last_vcpu last_vcpu[NR_CPUS]; |
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131 | |
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132 | #ifdef CONFIG_XEN_IA64_TLB_TRACK |
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133 | struct tlb_track* tlb_track; |
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134 | #endif |
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135 | }; |
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136 | #define INT_ENABLE_OFFSET(v) \ |
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137 | (sizeof(vcpu_info_t) * (v)->vcpu_id + \ |
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138 | offsetof(vcpu_info_t, evtchn_upcall_mask)) |
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139 | |
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140 | #ifdef CONFIG_XEN_IA64_PERVCPU_VHPT |
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141 | #define HAS_PERVCPU_VHPT(d) ((d)->arch.has_pervcpu_vhpt) |
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142 | #else |
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143 | #define HAS_PERVCPU_VHPT(d) (0) |
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144 | #endif |
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145 | |
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146 | |
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147 | struct arch_vcpu { |
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148 | /* Save the state of vcpu. |
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149 | This is the first entry to speed up accesses. */ |
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150 | mapped_regs_t *privregs; |
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151 | |
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152 | /* TR and TC. */ |
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153 | TR_ENTRY itrs[NITRS]; |
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154 | TR_ENTRY dtrs[NDTRS]; |
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155 | TR_ENTRY itlb; |
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156 | TR_ENTRY dtlb; |
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157 | |
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158 | /* Bit is set if there is a tr/tc for the region. */ |
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159 | unsigned char itr_regions; |
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160 | unsigned char dtr_regions; |
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161 | unsigned char tc_regions; |
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162 | |
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163 | unsigned long irr[4]; /* Interrupt request register. */ |
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164 | unsigned long insvc[4]; /* Interrupt in service. */ |
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165 | unsigned long iva; |
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166 | unsigned long domain_itm; |
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167 | unsigned long domain_itm_last; |
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168 | |
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169 | unsigned long event_callback_ip; // event callback handler |
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170 | unsigned long failsafe_callback_ip; // Do we need it? |
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171 | |
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172 | /* These fields are copied from arch_domain to make access easier/faster |
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173 | in assembly code. */ |
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174 | unsigned long metaphysical_rr0; // from arch_domain (so is pinned) |
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175 | unsigned long metaphysical_rr4; // from arch_domain (so is pinned) |
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176 | unsigned long metaphysical_saved_rr0; // from arch_domain (so is pinned) |
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177 | unsigned long metaphysical_saved_rr4; // from arch_domain (so is pinned) |
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178 | unsigned long fp_psr; // used for lazy float register |
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179 | int breakimm; // from arch_domain (so is pinned) |
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180 | int starting_rid; /* first RID assigned to domain */ |
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181 | int ending_rid; /* one beyond highest RID assigned to domain */ |
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182 | |
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183 | struct thread_struct _thread; // this must be last |
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184 | |
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185 | thash_cb_t vtlb; |
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186 | thash_cb_t vhpt; |
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187 | char irq_new_pending; |
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188 | char irq_new_condition; // vpsr.i/vtpr change, check for pending VHPI |
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189 | char hypercall_continuation; |
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190 | |
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191 | //for phycial emulation |
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192 | int mode_flags; |
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193 | fpswa_ret_t fpswa_ret; /* save return values of FPSWA emulation */ |
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194 | struct timer hlt_timer; |
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195 | struct arch_vmx_struct arch_vmx; /* Virtual Machine Extensions */ |
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196 | |
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197 | #ifdef CONFIG_XEN_IA64_PERVCPU_VHPT |
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198 | PTA pta; |
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199 | unsigned long vhpt_maddr; |
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200 | struct page_info* vhpt_page; |
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201 | unsigned long vhpt_entries; |
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202 | #endif |
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203 | #define INVALID_PROCESSOR INT_MAX |
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204 | int last_processor; |
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205 | cpumask_t cache_coherent_map; |
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206 | }; |
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207 | |
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208 | #include <asm/uaccess.h> /* for KERNEL_DS */ |
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209 | #include <asm/pgtable.h> |
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210 | |
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211 | /* Guest physical address of IO ports space. */ |
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212 | #define IO_PORTS_PADDR 0x00000ffffc000000UL |
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213 | #define IO_PORTS_SIZE 0x0000000004000000UL |
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214 | |
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215 | int |
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216 | do_perfmon_op(unsigned long cmd, |
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217 | XEN_GUEST_HANDLE(void) arg1, unsigned long arg2); |
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218 | |
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219 | #endif /* __ASM_DOMAIN_H__ */ |
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220 | |
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221 | /* |
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222 | * Local variables: |
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223 | * mode: C |
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224 | * c-set-style: "BSD" |
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225 | * c-basic-offset: 4 |
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226 | * tab-width: 4 |
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227 | * indent-tabs-mode: nil |
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228 | * End: |
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229 | */ |
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