1 | /* |
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2 | * Instruction-patching support. |
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3 | * |
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4 | * Copyright (C) 2003 Hewlett-Packard Co |
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5 | * David Mosberger-Tang <davidm@hpl.hp.com> |
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6 | */ |
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7 | #include <linux/init.h> |
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8 | #include <linux/string.h> |
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9 | |
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10 | #include <asm/patch.h> |
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11 | #include <asm/processor.h> |
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12 | #include <asm/sections.h> |
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13 | #include <asm/system.h> |
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14 | #include <asm/unistd.h> |
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15 | |
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16 | /* |
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17 | * This was adapted from code written by Tony Luck: |
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18 | * |
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19 | * The 64-bit value in a "movl reg=value" is scattered between the two words of the bundle |
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20 | * like this: |
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21 | * |
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22 | * 6 6 5 4 3 2 1 |
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23 | * 3210987654321098765432109876543210987654321098765432109876543210 |
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24 | * ABBBBBBBBBBBBBBBBBBBBBBBCCCCCCCCCCCCCCCCCCDEEEEEFFFFFFFFFGGGGGGG |
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25 | * |
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26 | * CCCCCCCCCCCCCCCCCCxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx |
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27 | * xxxxAFFFFFFFFFEEEEEDxGGGGGGGxxxxxxxxxxxxxBBBBBBBBBBBBBBBBBBBBBBB |
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28 | */ |
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29 | static u64 |
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30 | get_imm64 (u64 insn_addr) |
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31 | { |
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32 | u64 *p = (u64 *) (insn_addr & -16); /* mask out slot number */ |
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33 | |
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34 | return ( (p[1] & 0x0800000000000000UL) << 4) | /*A*/ |
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35 | ((p[1] & 0x00000000007fffffUL) << 40) | /*B*/ |
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36 | ((p[0] & 0xffffc00000000000UL) >> 24) | /*C*/ |
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37 | ((p[1] & 0x0000100000000000UL) >> 23) | /*D*/ |
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38 | ((p[1] & 0x0003e00000000000UL) >> 29) | /*E*/ |
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39 | ((p[1] & 0x07fc000000000000UL) >> 43) | /*F*/ |
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40 | ((p[1] & 0x000007f000000000UL) >> 36); /*G*/ |
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41 | } |
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42 | |
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43 | /* Patch instruction with "val" where "mask" has 1 bits. */ |
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44 | void |
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45 | ia64_patch (u64 insn_addr, u64 mask, u64 val) |
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46 | { |
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47 | u64 m0, m1, v0, v1, b0, b1, *b = (u64 *) (insn_addr & -16); |
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48 | # define insn_mask ((1UL << 41) - 1) |
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49 | unsigned long shift; |
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50 | |
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51 | b0 = b[0]; b1 = b[1]; |
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52 | shift = 5 + 41 * (insn_addr % 16); /* 5 bits of template, then 3 x 41-bit instructions */ |
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53 | if (shift >= 64) { |
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54 | m1 = mask << (shift - 64); |
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55 | v1 = val << (shift - 64); |
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56 | } else { |
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57 | m0 = mask << shift; m1 = mask >> (64 - shift); |
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58 | v0 = val << shift; v1 = val >> (64 - shift); |
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59 | b[0] = (b0 & ~m0) | (v0 & m0); |
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60 | } |
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61 | b[1] = (b1 & ~m1) | (v1 & m1); |
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62 | } |
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63 | |
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64 | void |
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65 | ia64_patch_imm64 (u64 insn_addr, u64 val) |
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66 | { |
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67 | /* The assembler may generate offset pointing to either slot 1 |
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68 | or slot 2 for a long (2-slot) instruction, occupying slots 1 |
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69 | and 2. */ |
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70 | insn_addr &= -16UL; |
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71 | ia64_patch(insn_addr + 2, |
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72 | 0x01fffefe000UL, ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */ |
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73 | | ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */ |
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74 | | ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */ |
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75 | | ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */ |
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76 | | ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */)); |
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77 | ia64_patch(insn_addr + 1, 0x1ffffffffffUL, val >> 22); |
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78 | } |
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79 | |
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80 | void |
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81 | ia64_patch_imm60 (u64 insn_addr, u64 val) |
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82 | { |
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83 | /* The assembler may generate offset pointing to either slot 1 |
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84 | or slot 2 for a long (2-slot) instruction, occupying slots 1 |
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85 | and 2. */ |
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86 | insn_addr &= -16UL; |
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87 | ia64_patch(insn_addr + 2, |
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88 | 0x011ffffe000UL, ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */ |
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89 | | ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */)); |
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90 | ia64_patch(insn_addr + 1, 0x1fffffffffcUL, val >> 18); |
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91 | } |
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92 | |
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93 | /* |
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94 | * We need sometimes to load the physical address of a kernel |
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95 | * object. Often we can convert the virtual address to physical |
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96 | * at execution time, but sometimes (either for performance reasons |
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97 | * or during error recovery) we cannot to this. Patch the marked |
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98 | * bundles to load the physical address. |
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99 | */ |
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100 | void __init |
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101 | ia64_patch_vtop (unsigned long start, unsigned long end) |
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102 | { |
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103 | s32 *offp = (s32 *) start; |
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104 | u64 ip; |
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105 | |
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106 | while (offp < (s32 *) end) { |
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107 | ip = (u64) offp + *offp; |
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108 | |
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109 | /* replace virtual address with corresponding physical address: */ |
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110 | ia64_patch_imm64(ip, ia64_tpa(get_imm64(ip))); |
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111 | ia64_fc((void *) ip); |
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112 | ++offp; |
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113 | } |
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114 | ia64_sync_i(); |
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115 | ia64_srlz_i(); |
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116 | } |
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117 | |
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118 | void __init |
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119 | ia64_patch_mckinley_e9 (unsigned long start, unsigned long end) |
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120 | { |
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121 | static int first_time = 1; |
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122 | int need_workaround; |
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123 | s32 *offp = (s32 *) start; |
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124 | u64 *wp; |
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125 | |
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126 | need_workaround = (local_cpu_data->family == 0x1f && local_cpu_data->model == 0); |
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127 | |
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128 | if (first_time) { |
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129 | first_time = 0; |
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130 | if (need_workaround) |
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131 | printk(KERN_INFO "Leaving McKinley Errata 9 workaround enabled\n"); |
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132 | else |
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133 | printk(KERN_INFO "McKinley Errata 9 workaround not needed; " |
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134 | "disabling it\n"); |
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135 | } |
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136 | if (need_workaround) |
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137 | return; |
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138 | |
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139 | while (offp < (s32 *) end) { |
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140 | wp = (u64 *) ia64_imva((char *) offp + *offp); |
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141 | wp[0] = 0x0000000100000000UL; /* nop.m 0; nop.i 0; nop.i 0 */ |
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142 | wp[1] = 0x0004000000000200UL; |
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143 | wp[2] = 0x0000000100000011UL; /* nop.m 0; nop.i 0; br.ret.sptk.many b6 */ |
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144 | wp[3] = 0x0084006880000200UL; |
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145 | ia64_fc(wp); ia64_fc(wp + 2); |
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146 | ++offp; |
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147 | } |
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148 | ia64_sync_i(); |
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149 | ia64_srlz_i(); |
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150 | } |
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151 | |
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152 | static void __init |
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153 | patch_fsyscall_table (unsigned long start, unsigned long end) |
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154 | { |
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155 | extern unsigned long fsyscall_table[NR_syscalls]; |
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156 | s32 *offp = (s32 *) start; |
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157 | u64 ip; |
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158 | |
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159 | while (offp < (s32 *) end) { |
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160 | ip = (u64) ia64_imva((char *) offp + *offp); |
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161 | ia64_patch_imm64(ip, (u64) fsyscall_table); |
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162 | ia64_fc((void *) ip); |
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163 | ++offp; |
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164 | } |
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165 | ia64_sync_i(); |
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166 | ia64_srlz_i(); |
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167 | } |
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168 | |
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169 | static void __init |
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170 | patch_brl_fsys_bubble_down (unsigned long start, unsigned long end) |
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171 | { |
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172 | extern char fsys_bubble_down[]; |
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173 | s32 *offp = (s32 *) start; |
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174 | u64 ip; |
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175 | |
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176 | while (offp < (s32 *) end) { |
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177 | ip = (u64) offp + *offp; |
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178 | ia64_patch_imm60((u64) ia64_imva((void *) ip), |
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179 | (u64) (fsys_bubble_down - (ip & -16)) / 16); |
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180 | ia64_fc((void *) ip); |
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181 | ++offp; |
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182 | } |
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183 | ia64_sync_i(); |
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184 | ia64_srlz_i(); |
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185 | } |
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186 | |
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187 | #ifdef CONFIG_XEN_IA64_VDSO_PARAVIRT |
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188 | extern char __start_gate_running_on_xen_patchlist[]; |
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189 | extern char __end_gate_running_on_xen_patchlist[]; |
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190 | |
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191 | void |
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192 | patch_running_on_xen(unsigned long start, unsigned long end) |
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193 | { |
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194 | extern int running_on_xen; |
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195 | s32 *offp = (s32 *)start; |
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196 | u64 ip; |
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197 | |
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198 | while (offp < (s32 *)end) { |
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199 | ip = (u64)ia64_imva((char *)offp + *offp); |
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200 | ia64_patch_imm64(ip, (u64)&running_on_xen); |
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201 | ia64_fc((void *)ip); |
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202 | ++offp; |
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203 | } |
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204 | ia64_sync_i(); |
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205 | ia64_srlz_i(); |
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206 | } |
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207 | |
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208 | static void |
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209 | patch_brl_symaddr(unsigned long start, unsigned long end, |
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210 | unsigned long symaddr) |
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211 | { |
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212 | s32 *offp = (s32 *)start; |
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213 | u64 ip; |
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214 | |
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215 | while (offp < (s32 *)end) { |
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216 | ip = (u64)offp + *offp; |
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217 | ia64_patch_imm60((u64)ia64_imva((void *)ip), |
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218 | (u64)(symaddr - (ip & -16)) / 16); |
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219 | ia64_fc((void *)ip); |
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220 | ++offp; |
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221 | } |
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222 | ia64_sync_i(); |
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223 | ia64_srlz_i(); |
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224 | } |
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225 | |
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226 | #define EXTERN_PATCHLIST(name) \ |
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227 | extern char __start_gate_brl_##name##_patchlist[]; \ |
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228 | extern char __end_gate_brl_##name##_patchlist[]; \ |
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229 | extern char name[] |
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230 | |
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231 | #define PATCH_BRL_SYMADDR(name) \ |
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232 | patch_brl_symaddr((unsigned long)__start_gate_brl_##name##_patchlist, \ |
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233 | (unsigned long)__end_gate_brl_##name##_patchlist, \ |
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234 | (unsigned long)name) |
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235 | |
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236 | static void |
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237 | patch_brl_in_vdso(void) |
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238 | { |
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239 | EXTERN_PATCHLIST(xen_ssm_i_0); |
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240 | EXTERN_PATCHLIST(xen_ssm_i_1); |
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241 | |
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242 | PATCH_BRL_SYMADDR(xen_ssm_i_0); |
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243 | PATCH_BRL_SYMADDR(xen_ssm_i_1); |
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244 | } |
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245 | #else |
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246 | #define patch_running_on_xen(start, end) do { } while (0) |
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247 | #define patch_brl_in_vdso() do { } while (0) |
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248 | #endif |
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249 | |
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250 | void __init |
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251 | ia64_patch_gate (void) |
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252 | { |
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253 | # define START(name) ((unsigned long) __start_gate_##name##_patchlist) |
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254 | # define END(name) ((unsigned long)__end_gate_##name##_patchlist) |
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255 | |
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256 | patch_fsyscall_table(START(fsyscall), END(fsyscall)); |
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257 | patch_brl_fsys_bubble_down(START(brl_fsys_bubble_down), END(brl_fsys_bubble_down)); |
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258 | #ifdef CONFIG_XEN |
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259 | patch_running_on_xen(START(running_on_xen), END(running_on_xen)); |
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260 | patch_brl_in_vdso(); |
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261 | #endif |
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262 | ia64_patch_vtop(START(vtop), END(vtop)); |
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263 | ia64_patch_mckinley_e9(START(mckinley_e9), END(mckinley_e9)); |
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264 | } |
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