1 | /* |
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2 | * This program is free software; you can redistribute it and/or modify |
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3 | * it under the terms of the GNU General Public License as published by |
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4 | * the Free Software Foundation; either version 2 of the License, or |
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5 | * (at your option) any later version. |
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6 | * |
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7 | * This program is distributed in the hope that it will be useful, |
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8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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10 | * GNU General Public License for more details. |
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11 | * |
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12 | * You should have received a copy of the GNU General Public License |
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13 | * along with this program; if not, write to the Free Software |
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14 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
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15 | * |
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16 | * Copyright (C) IBM Corp. 2005 |
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17 | * |
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18 | * Authors: Jimi Xenidis <jimix@watson.ibm.com> |
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19 | */ |
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20 | |
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21 | #include <xen/config.h> |
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22 | #include <xen/lib.h> |
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23 | #include <xen/sched.h> |
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24 | #include <xen/mm.h> |
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25 | #include <asm/current.h> |
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26 | |
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27 | void save_sprs(struct vcpu *v) |
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28 | { |
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29 | v->arch.timebase = mftb(); |
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30 | |
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31 | v->arch.sprg[0] = mfsprg0(); |
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32 | v->arch.sprg[1] = mfsprg1(); |
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33 | v->arch.sprg[2] = mfsprg2(); |
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34 | v->arch.sprg[3] = mfsprg3(); |
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35 | |
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36 | v->arch.dar = mfdar(); |
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37 | v->arch.dsisr = mfdsisr(); |
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38 | |
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39 | save_cpu_sprs(v); |
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40 | } |
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41 | |
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42 | void load_sprs(struct vcpu *v) |
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43 | { |
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44 | ulong timebase_delta; |
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45 | |
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46 | mtsprg0(v->arch.sprg[0]); |
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47 | mtsprg1(v->arch.sprg[1]); |
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48 | mtsprg2(v->arch.sprg[2]); |
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49 | mtsprg3(v->arch.sprg[3]); |
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50 | mtdar(v->arch.dar); |
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51 | mtdsisr(v->arch.dsisr); |
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52 | |
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53 | load_cpu_sprs(v); |
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54 | |
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55 | /* adjust the DEC value to account for cycles while not |
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56 | * running this OS */ |
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57 | timebase_delta = mftb() - v->arch.timebase; |
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58 | if (timebase_delta > v->arch.dec) |
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59 | v->arch.dec = 0; |
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60 | else |
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61 | v->arch.dec -= timebase_delta; |
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62 | } |
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63 | |
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64 | /* XXX evaluate all isyncs in segment code */ |
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65 | |
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66 | void flush_segments(void) |
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67 | { |
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68 | struct slb_entry slb0; |
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69 | ulong zero = 0; |
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70 | |
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71 | __asm__ __volatile__( |
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72 | "slbmfev %0,%2\n" |
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73 | "slbmfee %1,%2\n" |
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74 | :"=&r"(slb0.slb_vsid), "=&r"(slb0.slb_esid) |
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75 | :"r"(zero) |
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76 | :"memory"); |
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77 | |
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78 | /* we manually have to invalidate SLB[0] since slbia doesn't. */ |
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79 | /* XXX name magic constants! */ |
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80 | if (slb0.slb_esid & SLB_ESID_VALID) { |
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81 | ulong rb; |
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82 | ulong class; |
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83 | |
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84 | class = !!(slb0.slb_vsid & SLB_ESID_CLASS); |
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85 | rb = slb0.slb_esid & SLB_ESID_MASK; |
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86 | rb |= class << SLBIE_CLASS_LOG; |
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87 | |
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88 | slbie(rb); |
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89 | } |
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90 | slbia(); |
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91 | } |
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92 | |
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93 | void save_segments(struct vcpu *v) |
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94 | { |
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95 | struct slb_entry *slb_entry = v->arch.slb_entries; |
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96 | int i; |
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97 | |
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98 | /* save all extra SLBs */ |
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99 | for (i = 0; i < NUM_SLB_ENTRIES; i++) { |
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100 | ulong vsid; |
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101 | ulong esid; |
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102 | |
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103 | __asm__ __volatile__( |
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104 | "slbmfev %0,%2\n" |
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105 | "slbmfee %1,%2\n" |
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106 | :"=&r"(vsid), "=&r"(esid) |
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107 | :"r"(i) |
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108 | :"memory"); |
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109 | |
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110 | /* FIXME: should we bother to save invalid entries? */ |
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111 | slb_entry[i].slb_vsid = vsid; |
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112 | slb_entry[i].slb_esid = esid; |
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113 | #ifdef SLB_DEBUG |
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114 | if (vsid != 0) { |
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115 | printk("%s: DOM[0x%x]: S%02d: 0x%016lx 0x%016lx\n", |
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116 | __func__, v->domain->domain_id, i, vsid, esid); |
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117 | } |
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118 | #endif |
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119 | } |
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120 | |
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121 | flush_segments(); |
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122 | } |
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123 | |
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124 | void load_segments(struct vcpu *v) |
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125 | { |
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126 | struct slb_entry *slb_entry = v->arch.slb_entries; |
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127 | int i; |
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128 | |
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129 | /* restore all extra SLBs */ |
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130 | for (i = 0; i < NUM_SLB_ENTRIES; i++) { |
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131 | ulong vsid = slb_entry[i].slb_vsid; |
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132 | ulong esid = slb_entry[i].slb_esid; |
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133 | |
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134 | /* FIXME: should we bother to restore invalid entries */ |
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135 | /* stuff in the index here */ |
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136 | esid &= ~SLBMTE_ENTRY_MASK; |
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137 | esid |= i; |
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138 | |
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139 | __asm__ __volatile__( |
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140 | "isync\n" |
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141 | "slbmte %0,%1\n" |
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142 | "isync\n" |
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143 | : |
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144 | :"r" (vsid), "r"(esid) |
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145 | :"memory"); |
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146 | |
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147 | #ifdef SLB_DEBUG |
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148 | if (vsid != 0) { |
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149 | printk("%s: DOM[0x%x]: R%02d: 0x%016lx 0x%016lx\n", |
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150 | __func__, v->domain->domain_id, i, vsid, esid); |
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151 | } |
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152 | #endif |
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153 | } |
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154 | } |
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155 | |
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156 | void dump_segments(int valid) |
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157 | { |
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158 | int i; |
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159 | |
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160 | printk("Dump %s SLB entries:\n", valid ? "VALID" : "ALL"); |
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161 | |
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162 | /* save all extra SLBs */ |
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163 | for (i = 0; i < NUM_SLB_ENTRIES; i++) { |
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164 | ulong vsid; |
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165 | ulong esid; |
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166 | |
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167 | __asm__ __volatile__( |
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168 | "slbmfev %0,%2\n" |
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169 | "slbmfee %1,%2\n" |
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170 | :"=&r"(vsid), "=&r"(esid) |
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171 | :"r"(i) |
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172 | :"memory"); |
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173 | |
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174 | if (valid && !(esid & SLB_ESID_VALID)) |
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175 | continue; |
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176 | printk("S%02d: 0x%016lx 0x%016lx\n", i, vsid, esid); |
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177 | } |
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178 | } |
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