1 | /* |
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2 | * This program is free software; you can redistribute it and/or modify |
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3 | * it under the terms of the GNU General Public License as published by |
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4 | * the Free Software Foundation; either version 2 of the License, or |
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5 | * (at your option) any later version. |
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6 | * |
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7 | * This program is distributed in the hope that it will be useful, |
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8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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10 | * GNU General Public License for more details. |
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11 | * |
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12 | * You should have received a copy of the GNU General Public License |
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13 | * along with this program; if not, write to the Free Software |
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14 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
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15 | * |
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16 | * Copyright (C) IBM Corp. 2005 |
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17 | * |
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18 | * Authors: Jimi Xenidis <jimix@watson.ibm.com> |
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19 | */ |
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20 | |
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21 | #undef DEBUG |
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22 | #define INVALIDATE_ALL |
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23 | |
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24 | #include <xen/config.h> |
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25 | #include <xen/types.h> |
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26 | #include <xen/sched.h> |
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27 | #include <xen/init.h> |
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28 | #include <xen/mm.h> |
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29 | #include <public/xen.h> |
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30 | #include <asm/io.h> |
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31 | #include <asm/current.h> |
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32 | #include "tce.h" |
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33 | #include "iommu.h" |
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34 | #include "dart.h" |
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35 | |
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36 | #define TOO_MANY_RETRIES ~0 |
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37 | |
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38 | union dart_ctl { |
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39 | u32 dc_word; |
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40 | struct { |
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41 | u32 dc_darten:1; /* DART Enable (0:disabled) */ |
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42 | u32 dc_ione:1; /* Invalidate one DART TLB entry (using ILPN) */ |
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43 | u32 dc_iall:1; /* Invalidate all DART TLB entries */ |
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44 | u32 dc_idle:1; /* DART is idle */ |
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45 | u32 dc_peen:1; /* Parity Checking is enabled */ |
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46 | u32 dc_ilpn:27; /* 27-bit Logical Page Address for |
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47 | * invalidating one TLB entry */ |
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48 | } dc_bits; |
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49 | }; |
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50 | |
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51 | union dart_base { |
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52 | u32 db_word; |
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53 | struct { |
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54 | u32 _db_resv:8; |
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55 | u32 db_dartbase:24; /* Base Address of DART (4K byte Alignment) */ |
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56 | } db_bits; |
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57 | }; |
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58 | |
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59 | union dart_size { |
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60 | u32 ds_word; |
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61 | struct { |
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62 | u32 _ds_resv:15; |
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63 | u32 ds_dartsize:17; /* Size of Dart in 4K-Byte Pages */ |
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64 | } ds_bits; |
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65 | }; |
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66 | |
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67 | union dart_excp { |
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68 | u32 de_word; |
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69 | struct { |
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70 | u32 de_rqsrc:1; /* Request Source. [0:PCIE, 1:HT] */ |
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71 | u32 de_lpn:27; /* 27Ðbit Logical Address of Exception [25:51] */ |
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72 | u32 de_rqop:1; /* Request operation. [0:Read, 1:Write] */ |
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73 | u32 de_xcd:3; /* Exception code */ |
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74 | } de_bits; |
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75 | }; |
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76 | |
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77 | struct dart { |
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78 | /* 0x00 */ |
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79 | union dart_ctl d_dartcntl; |
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80 | u32 _pad0x04_0x10[3]; |
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81 | /* 0x10 */ |
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82 | union dart_base d_dartbase; |
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83 | u32 _pad0x14_0x20[3]; |
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84 | /* 0x20 */ |
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85 | union dart_size d_dartsize; |
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86 | u32 _pad0x24_0x30[3]; |
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87 | /* 0x30 */ |
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88 | union dart_excp d_dartexcp; |
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89 | u32 _pad0x34_0x40[3]; |
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90 | }; |
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91 | |
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92 | static volatile struct dart *dart; |
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93 | |
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94 | static void u4_inv_all(void) |
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95 | { |
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96 | union dart_ctl dc; |
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97 | ulong r = 0; |
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98 | int l = 0; |
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99 | |
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100 | for (;;) { |
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101 | dc.dc_word = in_32(&dart->d_dartcntl.dc_word); |
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102 | dc.dc_bits.dc_iall = 1; |
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103 | out_32(&dart->d_dartcntl.dc_word, dc.dc_word); |
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104 | |
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105 | do { |
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106 | dc.dc_word = in_32(&dart->d_dartcntl.dc_word); |
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107 | r++; |
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108 | } while ((dc.dc_bits.dc_iall == 1) && (r < (1 << l))); |
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109 | |
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110 | if (r == (1 << l)) { |
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111 | if (l < 4) { |
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112 | l++; |
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113 | dc.dc_word = in_32(&dart->d_dartcntl.dc_word); |
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114 | dc.dc_bits.dc_iall = 0; |
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115 | out_32(&dart->d_dartcntl.dc_word, dc.dc_word); |
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116 | continue; |
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117 | } else { |
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118 | panic(" broken U4???\n"); |
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119 | } |
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120 | } |
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121 | return; |
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122 | } |
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123 | } |
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124 | |
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125 | static void u4_inv_entry(ulong pgn) |
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126 | { |
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127 | #ifdef INVALIDATE_ALL |
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128 | return u4_inv_all(); |
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129 | #else |
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130 | union dart_ctl dc; |
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131 | ulong retries = 0; |
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132 | |
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133 | return u4_inv_all(); |
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134 | |
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135 | dc.dc_word = in_32(&dart->d_dartcntl.dc_word); |
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136 | dc.dc_bits.dc_ilpn = pgn; |
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137 | dc.dc_bits.dc_ione = 1; |
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138 | out_32(&dart->d_dartcntl.dc_word, dc.dc_word); |
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139 | |
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140 | /* wait for completion */ |
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141 | /* FIXME: since we do this from the HV do we need to wait?! */ |
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142 | do { |
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143 | dc.dc_word = in_32(&dart->d_dartcntl.dc_word); |
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144 | retries++; |
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145 | if (retries > 1000000) |
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146 | panic("WAY! too long\n"); |
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147 | } while (dc.dc_bits.dc_ione != 0); |
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148 | #endif |
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149 | } |
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150 | |
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151 | static struct dart_ops u4_ops = { |
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152 | .do_inv_all = u4_inv_all, |
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153 | .do_inv_entry = u4_inv_entry, |
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154 | }; |
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155 | |
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156 | struct dart_ops *u4_init(ulong base, ulong table, ulong dart_pages) |
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157 | { |
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158 | union dart_base db; |
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159 | union dart_size ds; |
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160 | union dart_ctl dc; |
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161 | |
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162 | dart = (struct dart *)base; |
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163 | |
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164 | db.db_word = 0; |
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165 | db.db_bits.db_dartbase = table >> PAGE_SHIFT; |
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166 | |
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167 | ds.ds_word = 0; |
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168 | ds.ds_bits.ds_dartsize = dart_pages; |
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169 | |
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170 | dc.dc_word = in_32(&dart->d_dartcntl.dc_word); |
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171 | if (dc.dc_bits.dc_darten == 1) { |
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172 | panic("%s: dart is already enabled: 0x%x\n", __func__, dc.dc_word); |
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173 | } |
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174 | dc.dc_bits.dc_darten = 1; /* enable it */ |
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175 | |
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176 | printk("Initializing DART Model U4: ctl: 0x%x base: 0x%x size: 0x%x\n", |
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177 | dc.dc_word, db.db_word, ds.ds_word); |
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178 | |
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179 | out_32(&dart->d_dartbase.db_word, db.db_word); |
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180 | out_32(&dart->d_dartsize.ds_word, ds.ds_word); |
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181 | out_32(&dart->d_dartcntl.dc_word, dc.dc_word); |
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182 | |
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183 | return &u4_ops; |
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184 | } |
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