[34] | 1 | /* |
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| 2 | * Host code generation |
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| 3 | * |
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| 4 | * Copyright (c) 2003 Fabrice Bellard |
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| 5 | * |
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| 6 | * This library is free software; you can redistribute it and/or |
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| 7 | * modify it under the terms of the GNU Lesser General Public |
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| 8 | * License as published by the Free Software Foundation; either |
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| 9 | * version 2 of the License, or (at your option) any later version. |
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| 10 | * |
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| 11 | * This library is distributed in the hope that it will be useful, |
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| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 14 | * Lesser General Public License for more details. |
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| 15 | * |
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| 16 | * You should have received a copy of the GNU Lesser General Public |
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| 17 | * License along with this library; if not, write to the Free Software |
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| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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| 19 | */ |
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| 20 | #include <stdarg.h> |
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| 21 | #include <stdlib.h> |
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| 22 | #include <stdio.h> |
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| 23 | #include <string.h> |
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| 24 | #include <inttypes.h> |
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| 25 | |
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| 26 | #include "config.h" |
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| 27 | |
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| 28 | #define NO_CPU_IO_DEFS |
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| 29 | #include "cpu.h" |
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| 30 | #include "exec-all.h" |
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| 31 | #include "disas.h" |
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| 32 | |
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| 33 | extern int dyngen_code(uint8_t *gen_code_buf, |
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| 34 | uint16_t *label_offsets, uint16_t *jmp_offsets, |
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| 35 | const uint16_t *opc_buf, const uint32_t *opparam_buf, const long *gen_labels); |
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| 36 | |
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| 37 | enum { |
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| 38 | #define DEF(s, n, copy_size) INDEX_op_ ## s, |
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| 39 | #include "opc.h" |
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| 40 | #undef DEF |
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| 41 | NB_OPS, |
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| 42 | }; |
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| 43 | |
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| 44 | uint16_t gen_opc_buf[OPC_BUF_SIZE]; |
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| 45 | uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE]; |
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| 46 | long gen_labels[OPC_BUF_SIZE]; |
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| 47 | int nb_gen_labels; |
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| 48 | |
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| 49 | target_ulong gen_opc_pc[OPC_BUF_SIZE]; |
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| 50 | uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; |
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| 51 | #if defined(TARGET_I386) |
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| 52 | uint8_t gen_opc_cc_op[OPC_BUF_SIZE]; |
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| 53 | #elif defined(TARGET_SPARC) |
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| 54 | target_ulong gen_opc_npc[OPC_BUF_SIZE]; |
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| 55 | target_ulong gen_opc_jump_pc[2]; |
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| 56 | #elif defined(TARGET_MIPS) |
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| 57 | uint32_t gen_opc_hflags[OPC_BUF_SIZE]; |
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| 58 | #endif |
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| 59 | |
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| 60 | int code_copy_enabled = 1; |
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| 61 | |
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| 62 | #ifdef DEBUG_DISAS |
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| 63 | static const char *op_str[] = { |
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| 64 | #define DEF(s, n, copy_size) #s, |
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| 65 | #include "opc.h" |
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| 66 | #undef DEF |
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| 67 | }; |
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| 68 | |
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| 69 | static uint8_t op_nb_args[] = { |
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| 70 | #define DEF(s, n, copy_size) n, |
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| 71 | #include "opc.h" |
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| 72 | #undef DEF |
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| 73 | }; |
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| 74 | |
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| 75 | static const unsigned short opc_copy_size[] = { |
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| 76 | #define DEF(s, n, copy_size) copy_size, |
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| 77 | #include "opc.h" |
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| 78 | #undef DEF |
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| 79 | }; |
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| 80 | |
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| 81 | void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf) |
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| 82 | { |
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| 83 | const uint16_t *opc_ptr; |
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| 84 | const uint32_t *opparam_ptr; |
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| 85 | int c, n, i; |
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| 86 | |
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| 87 | opc_ptr = opc_buf; |
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| 88 | opparam_ptr = opparam_buf; |
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| 89 | for(;;) { |
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| 90 | c = *opc_ptr++; |
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| 91 | n = op_nb_args[c]; |
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| 92 | fprintf(logfile, "0x%04x: %s", |
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| 93 | (int)(opc_ptr - opc_buf - 1), op_str[c]); |
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| 94 | for(i = 0; i < n; i++) { |
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| 95 | fprintf(logfile, " 0x%x", opparam_ptr[i]); |
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| 96 | } |
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| 97 | fprintf(logfile, "\n"); |
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| 98 | if (c == INDEX_op_end) |
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| 99 | break; |
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| 100 | opparam_ptr += n; |
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| 101 | } |
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| 102 | } |
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| 103 | |
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| 104 | #endif |
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| 105 | |
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| 106 | /* compute label info */ |
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| 107 | static void dyngen_labels(long *gen_labels, int nb_gen_labels, |
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| 108 | uint8_t *gen_code_buf, const uint16_t *opc_buf) |
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| 109 | { |
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| 110 | uint8_t *gen_code_ptr; |
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| 111 | int c, i; |
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| 112 | unsigned long gen_code_addr[OPC_BUF_SIZE]; |
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| 113 | |
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| 114 | if (nb_gen_labels == 0) |
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| 115 | return; |
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| 116 | /* compute the address of each op code */ |
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| 117 | |
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| 118 | gen_code_ptr = gen_code_buf; |
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| 119 | i = 0; |
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| 120 | for(;;) { |
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| 121 | c = opc_buf[i]; |
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| 122 | gen_code_addr[i] =(unsigned long)gen_code_ptr; |
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| 123 | if (c == INDEX_op_end) |
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| 124 | break; |
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| 125 | gen_code_ptr += opc_copy_size[c]; |
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| 126 | i++; |
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| 127 | } |
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| 128 | |
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| 129 | /* compute the address of each label */ |
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| 130 | for(i = 0; i < nb_gen_labels; i++) { |
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| 131 | gen_labels[i] = gen_code_addr[gen_labels[i]]; |
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| 132 | } |
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| 133 | } |
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| 134 | |
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| 135 | /* return non zero if the very first instruction is invalid so that |
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| 136 | the virtual CPU can trigger an exception. |
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| 137 | |
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| 138 | '*gen_code_size_ptr' contains the size of the generated code (host |
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| 139 | code). |
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| 140 | */ |
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| 141 | int cpu_gen_code(CPUState *env, TranslationBlock *tb, |
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| 142 | int max_code_size, int *gen_code_size_ptr) |
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| 143 | { |
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| 144 | uint8_t *gen_code_buf; |
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| 145 | int gen_code_size; |
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| 146 | |
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| 147 | #ifdef USE_CODE_COPY |
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| 148 | if (code_copy_enabled && |
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| 149 | cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) { |
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| 150 | /* nothing more to do */ |
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| 151 | } else |
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| 152 | #endif |
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| 153 | { |
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| 154 | if (gen_intermediate_code(env, tb) < 0) |
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| 155 | return -1; |
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| 156 | |
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| 157 | /* generate machine code */ |
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| 158 | tb->tb_next_offset[0] = 0xffff; |
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| 159 | tb->tb_next_offset[1] = 0xffff; |
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| 160 | gen_code_buf = tb->tc_ptr; |
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| 161 | #ifdef USE_DIRECT_JUMP |
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| 162 | /* the following two entries are optional (only used for string ops) */ |
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| 163 | tb->tb_jmp_offset[2] = 0xffff; |
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| 164 | tb->tb_jmp_offset[3] = 0xffff; |
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| 165 | #endif |
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| 166 | dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf); |
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| 167 | |
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| 168 | gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset, |
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| 169 | #ifdef USE_DIRECT_JUMP |
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| 170 | tb->tb_jmp_offset, |
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| 171 | #else |
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| 172 | NULL, |
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| 173 | #endif |
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| 174 | gen_opc_buf, gen_opparam_buf, gen_labels); |
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| 175 | } |
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| 176 | *gen_code_size_ptr = gen_code_size; |
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| 177 | #ifdef DEBUG_DISAS |
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| 178 | if (loglevel & CPU_LOG_TB_OUT_ASM) { |
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| 179 | fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr); |
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| 180 | disas(logfile, tb->tc_ptr, *gen_code_size_ptr); |
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| 181 | fprintf(logfile, "\n"); |
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| 182 | fflush(logfile); |
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| 183 | } |
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| 184 | #endif |
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| 185 | return 0; |
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| 186 | } |
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| 187 | |
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| 188 | /* The cpu state corresponding to 'searched_pc' is restored. |
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| 189 | */ |
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| 190 | int cpu_restore_state(TranslationBlock *tb, |
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| 191 | CPUState *env, unsigned long searched_pc, |
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| 192 | void *puc) |
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| 193 | { |
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| 194 | int j, c; |
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| 195 | unsigned long tc_ptr; |
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| 196 | uint16_t *opc_ptr; |
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| 197 | |
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| 198 | #ifdef USE_CODE_COPY |
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| 199 | if (tb->cflags & CF_CODE_COPY) { |
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| 200 | return cpu_restore_state_copy(tb, env, searched_pc, puc); |
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| 201 | } |
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| 202 | #endif |
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| 203 | if (gen_intermediate_code_pc(env, tb) < 0) |
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| 204 | return -1; |
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| 205 | |
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| 206 | /* find opc index corresponding to search_pc */ |
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| 207 | tc_ptr = (unsigned long)tb->tc_ptr; |
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| 208 | if (searched_pc < tc_ptr) |
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| 209 | return -1; |
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| 210 | j = 0; |
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| 211 | opc_ptr = gen_opc_buf; |
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| 212 | for(;;) { |
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| 213 | c = *opc_ptr; |
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| 214 | if (c == INDEX_op_end) |
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| 215 | return -1; |
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| 216 | tc_ptr += opc_copy_size[c]; |
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| 217 | if (searched_pc < tc_ptr) |
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| 218 | break; |
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| 219 | opc_ptr++; |
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| 220 | } |
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| 221 | j = opc_ptr - gen_opc_buf; |
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| 222 | /* now find start of instruction before */ |
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| 223 | while (gen_opc_instr_start[j] == 0) |
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| 224 | j--; |
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| 225 | #if defined(TARGET_I386) |
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| 226 | { |
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| 227 | int cc_op; |
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| 228 | #ifdef DEBUG_DISAS |
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| 229 | if (loglevel & CPU_LOG_TB_OP) { |
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| 230 | int i; |
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| 231 | fprintf(logfile, "RESTORE:\n"); |
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| 232 | for(i=0;i<=j; i++) { |
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| 233 | if (gen_opc_instr_start[i]) { |
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| 234 | fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]); |
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| 235 | } |
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| 236 | } |
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| 237 | fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", |
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| 238 | searched_pc, j, gen_opc_pc[j] - tb->cs_base, |
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| 239 | (uint32_t)tb->cs_base); |
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| 240 | } |
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| 241 | #endif |
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| 242 | env->eip = gen_opc_pc[j] - tb->cs_base; |
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| 243 | cc_op = gen_opc_cc_op[j]; |
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| 244 | if (cc_op != CC_OP_DYNAMIC) |
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| 245 | env->cc_op = cc_op; |
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| 246 | } |
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| 247 | #elif defined(TARGET_ARM) |
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| 248 | env->regs[15] = gen_opc_pc[j]; |
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| 249 | #elif defined(TARGET_SPARC) |
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| 250 | { |
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| 251 | target_ulong npc; |
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| 252 | env->pc = gen_opc_pc[j]; |
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| 253 | npc = gen_opc_npc[j]; |
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| 254 | if (npc == 1) { |
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| 255 | /* dynamic NPC: already stored */ |
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| 256 | } else if (npc == 2) { |
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| 257 | target_ulong t2 = (target_ulong)puc; |
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| 258 | /* jump PC: use T2 and the jump targets of the translation */ |
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| 259 | if (t2) |
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| 260 | env->npc = gen_opc_jump_pc[0]; |
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| 261 | else |
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| 262 | env->npc = gen_opc_jump_pc[1]; |
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| 263 | } else { |
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| 264 | env->npc = npc; |
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| 265 | } |
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| 266 | } |
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| 267 | #elif defined(TARGET_PPC) |
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| 268 | { |
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| 269 | int type; |
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| 270 | /* for PPC, we need to look at the micro operation to get the |
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| 271 | access type */ |
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| 272 | env->nip = gen_opc_pc[j]; |
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| 273 | switch(c) { |
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| 274 | #if defined(CONFIG_USER_ONLY) |
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| 275 | #define CASE3(op)\ |
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| 276 | case INDEX_op_ ## op ## _raw |
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| 277 | #else |
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| 278 | #define CASE3(op)\ |
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| 279 | case INDEX_op_ ## op ## _user:\ |
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| 280 | case INDEX_op_ ## op ## _kernel |
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| 281 | #endif |
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| 282 | |
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| 283 | CASE3(stfd): |
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| 284 | CASE3(stfs): |
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| 285 | CASE3(lfd): |
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| 286 | CASE3(lfs): |
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| 287 | type = ACCESS_FLOAT; |
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| 288 | break; |
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| 289 | CASE3(lwarx): |
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| 290 | type = ACCESS_RES; |
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| 291 | break; |
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| 292 | CASE3(stwcx): |
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| 293 | type = ACCESS_RES; |
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| 294 | break; |
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| 295 | CASE3(eciwx): |
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| 296 | CASE3(ecowx): |
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| 297 | type = ACCESS_EXT; |
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| 298 | break; |
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| 299 | default: |
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| 300 | type = ACCESS_INT; |
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| 301 | break; |
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| 302 | } |
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| 303 | env->access_type = type; |
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| 304 | } |
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| 305 | #elif defined(TARGET_MIPS) |
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| 306 | env->PC = gen_opc_pc[j]; |
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| 307 | env->hflags &= ~MIPS_HFLAG_BMASK; |
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| 308 | env->hflags |= gen_opc_hflags[j]; |
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| 309 | #endif |
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| 310 | return 0; |
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| 311 | } |
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