source: trunk/packages/xen-common/xen-common/tools/ioemu/patches/qemu-init-vgabios @ 34

Index: ioemu/hw/vga.c
===================================================================
--- ioemu.orig/hw/vga.c 2006-08-06 02:22:01.441324863 +0100
+++ ioemu/hw/vga.c      2006-08-06 02:22:46.606290142 +0100
@@ -1728,6 +1728,136 @@
     }
 }
 
+/* do the same job as vgabios before vgabios get ready - yeah */
+void vga_bios_init(VGAState *s)
+{
+    uint8_t palette_model[192] = {
+        0,   0,   0,   0,   0, 170,   0, 170,
+       0,   0, 170, 170, 170,   0,   0, 170,
+        0, 170, 170,  85,   0, 170, 170, 170,
+       85,  85,  85,  85,  85, 255,  85, 255,
+       85,  85, 255, 255, 255,  85,  85, 255, 
+       85, 255, 255, 255,  85, 255, 255, 255,
+        0,  21,   0,   0,  21,  42,   0,  63,
+        0,   0,  63,  42,  42,  21,   0,  42,
+       21,  42,  42,  63,   0,  42,  63,  42,
+        0,  21,  21,   0,  21,  63,   0,  63, 
+       21,   0,  63,  63,  42,  21,  21,  42,
+       21,  63,  42,  63,  21,  42,  63,  63,
+       21,   0,   0,  21,   0,  42,  21,  42,
+        0,  21,  42,  42,  63,   0,   0,  63,
+        0,  42,  63,  42,   0,  63,  42,  42,
+       21,   0,  21,  21,   0,  63,  21,  42,
+       21,  21,  42,  63,  63,   0,  21,  63,
+        0,  63,  63,  42,  21,  63,  42,  63,
+       21,  21,   0,  21,  21,  42,  21,  63,
+        0,  21,  63,  42,  63,  21,   0,  63,
+       21,  42,  63,  63,   0,  63,  63,  42,
+       21,  21,  21,  21,  21,  63,  21,  63,
+       21,  21,  63,  63,  63,  21,  21,  63,
+       21,  63,  63,  63,  21,  63,  63,  63
+    };
+
+    s->latch = 0; 
+
+    s->sr_index = 3; 
+    s->sr[0] = 3;
+    s->sr[1] = 0;
+    s->sr[2] = 3;
+    s->sr[3] = 0;
+    s->sr[4] = 2;
+    s->sr[5] = 0;
+    s->sr[6] = 0;
+    s->sr[7] = 0;
+
+    s->gr_index = 5; 
+    s->gr[0] = 0;
+    s->gr[1] = 0;
+    s->gr[2] = 0;
+    s->gr[3] = 0;
+    s->gr[4] = 0;
+    s->gr[5] = 16;
+    s->gr[6] = 14;
+    s->gr[7] = 15;
+    s->gr[8] = 255;
+
+    /* changed by out 0x03c0 */
+    s->ar_index = 32;
+    s->ar[0] = 0;
+    s->ar[1] = 1;
+    s->ar[2] = 2;
+    s->ar[3] = 3;
+    s->ar[4] = 4;
+    s->ar[5] = 5;
+    s->ar[6] = 6;
+    s->ar[7] = 7;
+    s->ar[8] = 8;
+    s->ar[9] = 9;
+    s->ar[10] = 10;
+    s->ar[11] = 11;
+    s->ar[12] = 12;
+    s->ar[13] = 13;
+    s->ar[14] = 14;
+    s->ar[15] = 15;
+    s->ar[16] = 12;
+    s->ar[17] = 0;
+    s->ar[18] = 15;
+    s->ar[19] = 8;
+    s->ar[20] = 0;
+
+    s->ar_flip_flop = 1; 
+
+    s->cr_index = 15; 
+    s->cr[0] = 95;
+    s->cr[1] = 79;
+    s->cr[2] = 80;
+    s->cr[3] = 130;
+    s->cr[4] = 85;
+    s->cr[5] = 129;
+    s->cr[6] = 191;
+    s->cr[7] = 31;
+    s->cr[8] = 0;
+    s->cr[9] = 79;
+    s->cr[10] = 14;
+    s->cr[11] = 15;
+    s->cr[12] = 0;
+    s->cr[13] = 0;
+    s->cr[14] = 5;
+    s->cr[15] = 160;
+    s->cr[16] = 156;
+    s->cr[17] = 142;
+    s->cr[18] = 143;
+    s->cr[19] = 40;
+    s->cr[20] = 31;
+    s->cr[21] = 150;
+    s->cr[22] = 185;
+    s->cr[23] = 163;
+    s->cr[24] = 255;
+
+    s->msr = 103; 
+    s->fcr = 0; 
+    s->st00 = 0; 
+    s->st01 = 0; 
+
+    /* dac_* & palette will be initialized by os through out 0x03c8 &
+     * out 0c03c9(1:3) */
+    s->dac_state = 0; 
+    s->dac_sub_index = 0; 
+    s->dac_read_index = 0; 
+    s->dac_write_index = 16; 
+    s->dac_cache[0] = 255;
+    s->dac_cache[1] = 255;
+    s->dac_cache[2] = 255;
+
+    /* palette */
+    memcpy(s->palette, palette_model, 192);
+
+    s->bank_offset = 0;
+    s->graphic_mode = -1;
+
+    /* TODO: add vbe support if enabled */
+}
+
 void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, 
                      unsigned long vga_ram_offset, int vga_ram_size)
 {
@@ -1769,6 +1899,8 @@
                          vga_screen_dump, s);
     /* XXX: currently needed for display */
     vga_state = s;
+
+    vga_bios_init(s);
 }