[34] | 1 | # HG changeset patch |
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| 2 | # User kfraser@localhost.localdomain |
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| 3 | # Node ID 71e2a165aa7f81602c569430b18ba1ea705f0b70 |
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| 4 | # Parent da66691687dfd90c55420cfdf27f55d18cca7810 |
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| 5 | [HVM] Move RTC emulation into the hypervisor. |
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| 6 | Signed-off-by: Xiaowei Yang <xiaowei.yang@intel.com> |
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| 7 | |
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| 8 | Index: ioemu/Makefile.target |
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| 9 | =================================================================== |
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| 10 | --- ioemu.orig/Makefile.target 2006-12-08 01:41:15.000000000 +0000 |
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| 11 | +++ ioemu/Makefile.target 2006-12-08 01:41:15.000000000 +0000 |
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| 12 | @@ -295,7 +295,11 @@ |
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| 13 | endif |
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| 14 | |
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| 15 | # qemu-dm objects |
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| 16 | +ifeq ($(ARCH),ia64) |
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| 17 | LIBOBJS=helper2.o exec-dm.o i8259-dm.o |
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| 18 | +else |
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| 19 | +LIBOBJS=helper2.o exec-dm.o i8259-dm.o rtc-dm.o |
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| 20 | +endif |
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| 21 | |
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| 22 | all: $(PROGS) |
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| 23 | |
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| 24 | @@ -355,7 +359,11 @@ |
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| 25 | ifeq ($(TARGET_BASE_ARCH), i386) |
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| 26 | # Hardware support |
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| 27 | VL_OBJS+= ide.o pckbd.o ps2.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) |
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| 28 | +ifeq ($(ARCH),ia64) |
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| 29 | VL_OBJS+= fdc.o mc146818rtc.o serial.o pc.o |
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| 30 | +else |
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| 31 | +VL_OBJS+= fdc.o serial.o pc.o |
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| 32 | +endif |
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| 33 | VL_OBJS+= cirrus_vga.o mixeng.o parallel.o acpi.o piix_pci.o |
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| 34 | VL_OBJS+= usb-uhci.o |
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| 35 | VL_OBJS+= piix4acpi.o |
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| 36 | Index: ioemu/target-i386-dm/rtc-dm.c |
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| 37 | =================================================================== |
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| 38 | --- /dev/null 1970-01-01 00:00:00.000000000 +0000 |
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| 39 | +++ ioemu/target-i386-dm/rtc-dm.c 2006-12-08 01:41:15.000000000 +0000 |
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| 40 | @@ -0,0 +1,107 @@ |
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| 41 | +/* |
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| 42 | + * QEMU MC146818 RTC emulation |
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| 43 | + * |
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| 44 | + * Copyright (c) 2003-2004 Fabrice Bellard |
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| 45 | + * |
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| 46 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
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| 47 | + * of this software and associated documentation files (the "Software"), to deal |
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| 48 | + * in the Software without restriction, including without limitation the rights |
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| 49 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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| 50 | + * copies of the Software, and to permit persons to whom the Software is |
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| 51 | + * furnished to do so, subject to the following conditions: |
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| 52 | + * |
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| 53 | + * The above copyright notice and this permission notice shall be included in |
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| 54 | + * all copies or substantial portions of the Software. |
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| 55 | + * |
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| 56 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 57 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 58 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 59 | + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 60 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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| 61 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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| 62 | + * THE SOFTWARE. |
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| 63 | + */ |
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| 64 | + |
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| 65 | +#include "vl.h" |
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| 66 | + |
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| 67 | +//#define DEBUG_CMOS |
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| 68 | + |
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| 69 | +struct RTCState { |
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| 70 | + uint8_t cmos_data[128]; |
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| 71 | + uint8_t cmos_index; |
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| 72 | +}; |
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| 73 | + |
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| 74 | +void rtc_set_memory(RTCState *s, int addr, int val) |
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| 75 | +{ |
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| 76 | + if (addr >= 0 && addr <= 127) |
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| 77 | + s->cmos_data[addr] = val; |
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| 78 | +} |
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| 79 | + |
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| 80 | +static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data) |
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| 81 | +{ |
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| 82 | + RTCState *s = opaque; |
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| 83 | + |
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| 84 | + if ((addr & 1) == 0) { |
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| 85 | + s->cmos_index = data & 0x7f; |
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| 86 | + } else { |
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| 87 | +#ifdef DEBUG_CMOS |
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| 88 | + printf("cmos: write index=0x%02x val=0x%02x\n", |
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| 89 | + s->cmos_index, data); |
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| 90 | +#endif |
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| 91 | + s->cmos_data[s->cmos_index] = data; |
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| 92 | + } |
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| 93 | +} |
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| 94 | + |
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| 95 | +static uint32_t cmos_ioport_read(void *opaque, uint32_t addr) |
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| 96 | +{ |
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| 97 | + RTCState *s = opaque; |
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| 98 | + int ret; |
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| 99 | + if ((addr & 1) == 0) { |
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| 100 | + return 0xff; |
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| 101 | + } else { |
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| 102 | + ret = s->cmos_data[s->cmos_index]; |
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| 103 | +#ifdef DEBUG_CMOS |
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| 104 | + printf("cmos: read index=0x%02x val=0x%02x\n", |
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| 105 | + s->cmos_index, ret); |
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| 106 | +#endif |
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| 107 | + return ret; |
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| 108 | + } |
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| 109 | +} |
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| 110 | + |
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| 111 | +static void rtc_save(QEMUFile *f, void *opaque) |
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| 112 | +{ |
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| 113 | + RTCState *s = opaque; |
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| 114 | + |
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| 115 | + qemu_put_buffer(f, s->cmos_data, 128); |
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| 116 | + qemu_put_8s(f, &s->cmos_index); |
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| 117 | +} |
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| 118 | + |
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| 119 | +static int rtc_load(QEMUFile *f, void *opaque, int version_id) |
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| 120 | +{ |
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| 121 | + RTCState *s = opaque; |
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| 122 | + |
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| 123 | + if (version_id != 1) |
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| 124 | + return -EINVAL; |
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| 125 | + |
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| 126 | + qemu_get_buffer(f, s->cmos_data, 128); |
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| 127 | + qemu_get_8s(f, &s->cmos_index); |
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| 128 | + |
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| 129 | + return 0; |
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| 130 | +} |
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| 131 | + |
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| 132 | +RTCState *rtc_init(int base, int irq) |
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| 133 | +{ |
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| 134 | + RTCState *s; |
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| 135 | + |
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| 136 | + s = qemu_mallocz(sizeof(RTCState)); |
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| 137 | + if (!s) |
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| 138 | + return NULL; |
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| 139 | + |
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| 140 | + register_ioport_write(base, 2, 1, cmos_ioport_write, s); |
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| 141 | + register_ioport_read(base, 2, 1, cmos_ioport_read, s); |
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| 142 | + |
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| 143 | + register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s); |
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| 144 | + return s; |
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| 145 | +} |
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| 146 | + |
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| 147 | +void rtc_set_date(RTCState *s, const struct tm *tm) {} |
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