1 | VBE Display API |
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2 | ------------------------------------------------------------------------------------------------------------- |
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3 | This document is part of the Bochs/VBEBios documentation, |
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4 | it specifies the bochs host <-> vbebios client communication. |
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5 | |
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6 | That means, the display code implementation and the vbebios code depend |
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7 | very heavily on each other. As such, this documents needs be synchronised |
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8 | between bochs CVS and the vgabios CVS. |
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9 | |
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10 | This document does not describe how the VBEBios implements the VBE2/3 spec. |
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11 | This document does not describe how the Bochs display code will display gfx based upon this spec. |
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12 | |
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13 | |
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14 | API History |
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15 | ----------- |
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16 | 0xb0c0 supports the following VBE_DISPI_ interfaces (present in Bochs 1.4): |
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17 | VBE_DISPI_INDEX_ID |
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18 | VBE_DISPI_INDEX_XRES |
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19 | VBE_DISPI_INDEX_YRES |
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20 | VBE_DISPI_INDEX_BPP |
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21 | VBE_DISPI_INDEX_ENABLE |
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22 | VBE_DISPI_INDEX_BANK |
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23 | |
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24 | Bpp format supported is: |
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25 | VBE_DISPI_BPP_8 |
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26 | |
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27 | 0xb0c1 supports 0xb0c0 VBE_DISPI_ interfaces, additional interfaces (present in Bochs 2.0): |
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28 | VBE_DISPI_INDEX_VIRT_WIDTH |
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29 | VBE_DISPI_INDEX_VIRT_HEIGHT |
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30 | VBE_DISPI_INDEX_X_OFFSET |
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31 | VBE_DISPI_INDEX_Y_OFFSET |
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32 | |
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33 | 0xb0c2 supports 0xb0c1 VBE_DISPI_ interfaces, interfaces updated for |
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34 | additional features (present in Bochs 2.1): |
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35 | VBE_DISPI_INDEX_BPP supports >8bpp color depth (value = bits) |
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36 | VBE_DISPI_INDEX_ENABLE supports new flags VBE_DISPI_NOCLEARMEM and VBE_DISPI_LFB_ENABLED |
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37 | VBE i/o registers changed from 0xFF80/81 to 0x01CE/CF |
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38 | |
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39 | 0xb0c3 supports 0xb0c2 VBE_DISPI_ interfaces, interfaces updated for |
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40 | additional features: |
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41 | VBE_DISPI_INDEX_ENABLE supports new flags VBE_DISPI_GETCAPS and VBE_DISPI_8BIT_DAC |
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42 | |
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43 | |
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44 | History |
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45 | ------- |
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46 | Version 0.6 2002 Nov 23 Jeroen Janssen |
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47 | - Added LFB support |
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48 | - Added Virt width, height and x,y offset |
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49 | |
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50 | Version 0.5 2002 March 08 Jeroen Janssen |
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51 | - Added documentation about panic behaviour / current limits of the data values. |
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52 | - Changed BPP API (in order to include future (A)RGB formats) |
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53 | - Initial version (based upon extended display text of the vbe bochs display patch) |
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54 | |
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55 | |
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56 | Todo |
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57 | ---- |
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58 | Version 0.6+ [random order] |
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59 | - Add lots of different (A)RGB formats |
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60 | |
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61 | References |
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62 | ---------- |
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63 | [VBE3] VBE 3 Specification at |
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64 | http://www.vesa.org/vbe3.pdf |
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65 | |
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66 | [BOCHS] Bochs Open Source IA-32 Emulator at |
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67 | http://bochs.sourceforge.net |
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68 | |
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69 | [VBEBIOS] VBE Bios for Bochs at |
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70 | http://savannah.gnu.org/projects/vgabios/ |
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71 | |
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72 | [Screenshots] Screenshots of programs using the VBE Bios at |
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73 | http://japj.org/projects/bochs_plex86/screenshots.html |
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74 | |
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75 | Abbreviations |
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76 | ------------- |
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77 | VBE Vesa Bios Extension |
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78 | DISPI (Bochs) Display Interface |
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79 | BPP Bits Per Pixel |
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80 | LFB Linear Frame Buffer |
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81 | |
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82 | |
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83 | #defines |
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84 | -------- |
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85 | #define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 4 |
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86 | #define VBE_DISPI_BANK_ADDRESS 0xA0000 |
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87 | #define VBE_DISPI_BANK_SIZE_KB 64 |
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88 | |
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89 | #define VBE_DISPI_MAX_XRES 1024 |
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90 | #define VBE_DISPI_MAX_YRES 768 |
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91 | |
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92 | #define VBE_DISPI_IOPORT_INDEX 0x01CE |
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93 | #define VBE_DISPI_IOPORT_DATA 0x01CF |
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94 | |
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95 | #define VBE_DISPI_INDEX_ID 0x0 |
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96 | #define VBE_DISPI_INDEX_XRES 0x1 |
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97 | #define VBE_DISPI_INDEX_YRES 0x2 |
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98 | #define VBE_DISPI_INDEX_BPP 0x3 |
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99 | #define VBE_DISPI_INDEX_ENABLE 0x4 |
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100 | #define VBE_DISPI_INDEX_BANK 0x5 |
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101 | #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6 |
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102 | #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7 |
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103 | #define VBE_DISPI_INDEX_X_OFFSET 0x8 |
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104 | #define VBE_DISPI_INDEX_Y_OFFSET 0x9 |
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105 | |
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106 | #define VBE_DISPI_ID0 0xB0C0 |
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107 | #define VBE_DISPI_ID1 0xB0C1 |
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108 | #define VBE_DISPI_ID2 0xB0C2 |
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109 | |
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110 | #define VBE_DISPI_DISABLED 0x00 |
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111 | #define VBE_DISPI_ENABLED 0x01 |
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112 | #define VBE_DISPI_VBE_ENABLED 0x40 |
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113 | #define VBE_DISPI_NOCLEARMEM 0x80 |
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114 | |
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115 | #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000 |
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116 | |
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117 | API |
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118 | --- |
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119 | The display api works by using a index (VBE_DISPI_IOPORT_INDEX) and |
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120 | data (VBE_DISPI_IOPORT_DATA) ioport. One writes the index of the parameter to the index port. |
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121 | Next, the parameter value can be read or written. |
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122 | |
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123 | [0xb0c0] |
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124 | * VBE_DISPI_INDEX_ID : WORD {R,W} |
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125 | This parameter can be used to detect the current display API (both bochs & vbebios). |
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126 | The bios writes VBE_DISPI_ID0 to the dataport and reads it back again. |
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127 | This way, the display code knows the vbebios 'ID' and the vbebios can check if the correct |
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128 | display code is present. |
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129 | As a result, a PANIC can be generated if an incompatible vbebios/display code combination is detected. |
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130 | This panic can be generated from the bochs display code (NOT the bios, see Notes). |
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131 | |
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132 | Example values: VBE_DISPI_ID0 |
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133 | |
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134 | * VBE_DISPI_INDEX_XRES : WORD {R,W} |
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135 | This parameter can be used to read/write the vbe display X resolution (in pixels). |
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136 | It's illegal to set the XRES when the VBE is enabled (display code should generate PANIC). |
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137 | |
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138 | If the value written exceeds VBE_DISPI_MAX_XRES, the display code needs to generate a PANIC. |
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139 | |
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140 | Example values: 320,640,800,1024 |
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141 | |
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142 | * VBE_DISPI_INDEX_YRES : WORD {R,W} |
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143 | This parameter can be used to read/write the vbe display Y resolution (in pixels). |
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144 | It's illegal to set the YRES when the VBE is enabled (display code should generate PANIC). |
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145 | |
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146 | If the value written exceeds VBE_DISPI_MAX_YRES, the display code needs to generate a PANIC. |
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147 | |
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148 | Example values: 200,400,480,600,768 |
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149 | |
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150 | * VBE_DISPI_INDEX_BPP : WORD {R,W} |
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151 | This parameter can be used to read/write the vbe display BPP. |
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152 | It's illegal to set the BPP when the VBE is enabled (display code should generate PANIC). |
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153 | |
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154 | If the value written is an incompatible BPP, the display code needs to generate a PANIC. |
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155 | |
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156 | Example values: VBE_DISPI_BPP_8 |
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157 | |
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158 | * VBE_DISPI_INDEX_ENABLE : WORD {R,W} |
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159 | This parameter can be used to read/write the vbe ENABLED state. |
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160 | If the bios writes VBE_DISPI_ENABLED then the display code will setup a hostside display mode |
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161 | with the current XRES, YRES and BPP settings. |
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162 | If the bios write VBE_DISPI_DISABLED then the display code will switch back to normal vga mode behaviour. |
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163 | |
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164 | Example values: VBE_DISPI_ENABLED, VBE_DISPI_DISABLED |
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165 | |
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166 | * VBE_DISPI_INDEX_BANK : WORD {R,W} |
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167 | This parameter can be used to read/write the current selected BANK (at 0xA0000). |
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168 | This can be used for switching banks in banked mode. |
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169 | |
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170 | [0xb0c1] |
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171 | * VBE_DISPI_INDEX_VIRT_WIDTH : WORD {R,W} |
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172 | This parameter can be used to read/write the current virtual width. |
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173 | Upon enabling a mode, this will be set to the current xres |
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174 | Setting this field during enabled mode will result in the virtual width to be changed. |
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175 | Value will be adjusted if current setting is not possible. |
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176 | |
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177 | * VBE_DISPI_INDEX_VIRT_HEIGHT : WORD {R} |
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178 | This parameter can be read in order to obtain the current virtual height. |
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179 | This setting will be adjusted after setting a virtual width in order to stay within limit of video memory. |
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180 | |
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181 | * VBE_DISPI_INDEX_X_OFFSET : WORD {R,W} |
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182 | The current X offset (in pixels!) of the visible screen part. |
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183 | Writing a new offset will also result in a complete screen refresh. |
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184 | |
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185 | * VBE_DISPI_INDEX_Y_OFFSET : WORD {R,W} |
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186 | The current Y offset (in pixels!) of the visible screen part. |
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187 | Writing a new offset will also result in a complete screen refresh. |
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188 | |
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189 | |
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190 | [0xb0c2] |
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191 | * VBE_DISPI_INDEX_BPP : WORD {R,W} |
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192 | The value written is now the number of bits per pixel. A value of 0 is treated |
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193 | the same as 8 for backward compatibilty. These values are supported: 8, 15, |
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194 | 16, 24 and 32. The value of 4 is not yet handled in the VBE code. |
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195 | * VBE_DISPI_INDEX_ENABLE : WORD {R,W} |
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196 | The new flag VBE_DISPI_NOCLEARMEM allows to preserve the VBE video memory. |
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197 | The new flag VBE_DISPI_LFB_ENABLED indicates the usage of the LFB. |
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198 | |
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199 | [0xb0c3] |
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200 | * VBE_DISPI_INDEX_ENABLE : WORD {R,W} |
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201 | If the new flag VBE_DISPI_GETCAPS is enabled, the xres, yres and bpp registers |
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202 | return the gui capabilities. |
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203 | The new flag VBE_DISPI_8BIT_DAC switches the DAC to 8 bit mode. |
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204 | |
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205 | Displaying GFX (banked mode) |
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206 | -------------- |
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207 | What happens is that the total screen is devided in banks of 'VBE_DISPI_BANK_SIZE_KB' KiloByte in size. |
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208 | If you want to set a pixel you can calculate its bank by doing: |
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209 | |
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210 | offset = pixel_x + pixel_y * resolution_x; |
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211 | bank = offset / 64 Kb (rounded 1.9999 -> 1) |
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212 | |
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213 | bank_pixel_pos = offset - bank * 64Kb |
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214 | |
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215 | Now you can set the current bank and put the pixel at VBE_DISPI_BANK_ADDRESS + bank_pixel_pos |
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216 | |
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217 | Displaying GFX (linear frame buffer mode) |
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218 | -------------- |
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219 | NOT WRITTEN YET |
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220 | |
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221 | Notes |
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222 | ----- |
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223 | * Since the XRES/YRES/BPP may not be written when VBE is enabled, if you want to switch from one VBE mode |
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224 | to another, you will need to disable VBE first. |
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225 | |
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226 | * Note when the bios doesn't find a valid DISPI_ID, it can disable the VBE functions. This allows people to |
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227 | use the same bios for both vbe enabled and disabled bochs executables. |
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