1 | /* |
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2 | * This program is free software; you can redistribute it and/or modify |
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3 | * it under the terms of the GNU General Public License as published by |
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4 | * the Free Software Foundation; either version 2 of the License, or |
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5 | * (at your option) any later version. |
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6 | * |
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7 | * This program is distributed in the hope that it will be useful, |
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8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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10 | * GNU General Public License for more details. |
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11 | * |
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12 | * You should have received a copy of the GNU General Public License |
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13 | * along with this program; if not, write to the Free Software |
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14 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
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15 | * |
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16 | * Copyright (C) IBM Corp. 2006 |
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17 | * |
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18 | * Authors: Jimi Xenidis <jimix@watson.ibm.com> |
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19 | */ |
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20 | |
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21 | #include <xen/config.h> |
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22 | #include <xen/types.h> |
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23 | #include <xen/lib.h> |
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24 | #include <xen/console.h> |
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25 | #include <xen/errno.h> |
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26 | #include <asm/delay.h> |
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27 | #include <asm/processor.h> |
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28 | #include "scom.h" |
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29 | |
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30 | #undef CONFIG_SCOM |
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31 | |
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32 | #define SPRN_SCOMC 276 |
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33 | #define SPRN_SCOMD 277 |
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34 | #define SCOMC_READ 1 |
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35 | #define SCOMC_WRITE (!(SCOMC_READ)) |
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36 | |
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37 | union scomc { |
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38 | struct scomc_bits { |
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39 | ulong _reserved_0_31: 32; |
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40 | ulong addr: 16; |
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41 | ulong RW: 1; |
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42 | ulong _reserved_49_55: 7; |
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43 | ulong _reserved_56: 1; |
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44 | ulong proto_error: 1; |
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45 | ulong addr_error: 1; |
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46 | ulong iface_error: 1; |
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47 | ulong disabled: 1; |
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48 | ulong _reserved_61_62: 2; |
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49 | ulong failure: 1; |
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50 | } bits; |
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51 | ulong word; |
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52 | }; |
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53 | |
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54 | |
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55 | int cpu_scom_read(uint addr, ulong *d) |
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56 | { |
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57 | union scomc c; |
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58 | ulong flags; |
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59 | |
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60 | /* drop the low 8bits (including parity) */ |
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61 | addr >>= 8; |
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62 | |
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63 | /* these give iface errors because the addresses are not software |
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64 | * accessible */ |
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65 | BUG_ON(addr & 0x8000); |
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66 | |
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67 | for (;;) { |
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68 | c.word = 0; |
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69 | c.bits.addr = addr; |
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70 | c.bits.RW = SCOMC_READ; |
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71 | |
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72 | local_irq_save(flags); |
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73 | asm volatile ( |
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74 | "sync \n\t" |
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75 | "mtspr %2, %0 \n\t" |
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76 | "isync \n\t" |
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77 | "mfspr %1, %3 \n\t" |
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78 | "isync \n\t" |
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79 | "mfspr %0, %2 \n\t" |
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80 | "isync \n\t" |
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81 | : "+r" (c.word), "=r" (*d) |
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82 | : "i"(SPRN_SCOMC), "i"(SPRN_SCOMD)); |
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83 | |
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84 | local_irq_restore(flags); |
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85 | /* WARNING! older 970s (pre FX) shift the bits right 1 position */ |
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86 | |
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87 | if (!c.bits.failure) |
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88 | return 0; |
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89 | |
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90 | /* deal with errors */ |
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91 | /* has SCOM been disabled? */ |
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92 | if (c.bits.disabled) |
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93 | return -ENOSYS; |
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94 | |
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95 | /* we were passed a bad addr return -1 */ |
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96 | if (c.bits.addr_error) |
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97 | return -EINVAL; |
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98 | |
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99 | /* this is way bad and we will checkstop soon */ |
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100 | BUG_ON(c.bits.proto_error); |
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101 | |
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102 | if (c.bits.iface_error) |
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103 | udelay(10); |
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104 | } |
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105 | } |
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106 | |
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107 | int cpu_scom_write(uint addr, ulong d) |
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108 | { |
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109 | union scomc c; |
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110 | ulong flags; |
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111 | |
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112 | /* drop the low 8bits (including parity) */ |
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113 | addr >>= 8; |
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114 | |
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115 | /* these give iface errors because the addresses are not software |
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116 | * accessible */ |
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117 | BUG_ON(addr & 0x8000); |
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118 | |
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119 | for (;;) { |
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120 | c.word = 0; |
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121 | c.bits.addr = addr; |
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122 | c.bits.RW = SCOMC_WRITE; |
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123 | |
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124 | local_irq_save(flags); |
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125 | asm volatile( |
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126 | "sync \n\t" |
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127 | "mtspr %3, %1 \n\t" |
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128 | "isync \n\t" |
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129 | "mtspr %2, %0 \n\t" |
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130 | "isync \n\t" |
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131 | "mfspr %0, %2 \n\t" |
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132 | "isync \n\t" |
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133 | : "+r" (c.word) |
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134 | : "r" (d), "i"(SPRN_SCOMC), "i"(SPRN_SCOMD)); |
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135 | local_irq_restore(flags); |
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136 | |
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137 | if (!c.bits.failure) |
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138 | return 0; |
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139 | |
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140 | /* has SCOM been disabled? */ |
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141 | if (c.bits.disabled) |
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142 | return -ENOSYS; |
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143 | |
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144 | /* we were passed a bad addr return -1 */ |
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145 | if (c.bits.addr_error) |
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146 | return -EINVAL; |
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147 | |
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148 | /* this is way bad and we will checkstop soon */ |
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149 | BUG_ON(c.bits.proto_error); |
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150 | |
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151 | /* check for iface and retry */ |
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152 | if (c.bits.iface_error) |
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153 | udelay(10); |
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154 | } |
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155 | } |
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156 | |
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157 | void cpu_scom_init(void) |
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158 | { |
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159 | #ifdef CONFIG_SCOM |
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160 | ulong val; |
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161 | if (PVR_REV(mfpvr()) == PV_970FX) { |
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162 | /* these address are only good for 970FX */ |
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163 | console_start_sync(); |
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164 | if (!cpu_scom_read(SCOM_PTSR, &val)) |
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165 | printk("SCOM PTSR: 0x%016lx\n", val); |
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166 | |
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167 | console_end_sync(); |
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168 | } |
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169 | #endif |
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170 | } |
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171 | |
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172 | void cpu_scom_AMCR(void) |
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173 | { |
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174 | #ifdef CONFIG_SCOM |
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175 | ulong val; |
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176 | |
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177 | if (PVR_REV(mfpvr()) == PV_970FX) { |
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178 | /* these address are only good for 970FX */ |
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179 | cpu_scom_read(SCOM_AMC_REG, &val); |
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180 | printk("SCOM AMCR: 0x%016lx\n", val); |
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181 | } |
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182 | #endif |
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183 | } |
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184 | |
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