1 | /* |
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2 | * Binary translate privilege-sensitive ops to privileged |
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3 | * |
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4 | * Copyright (C) 2004 Hewlett-Packard Co. |
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5 | * Dan Magenheimer (dan.magenheimer@hp.com) |
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6 | * |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Macros to replace privilege-sensitive instructions (and reads from |
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11 | * write-trapping registers) with privileged/trapping instructions as follows: |
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12 | * mov rx=ar.cflg -> mov ar.cflg=r(x+64) [**] |
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13 | * mov rx=ar.ky -> mov ar.ky=r(x+64) |
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14 | * fc rx -> ptc r(x+64) |
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15 | * thash rx=ry -> tak rx=r(y+64) |
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16 | * ttag rx=ry -> tpa rx=r(y+64) |
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17 | * mov rx=cpuid[ry] -> mov r(x+64)=rr[ry] |
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18 | * mov rx=pmd[ry] -> mov r(x+64)=pmc[ry] [**] |
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19 | * cover -> break.b 0x1fffff |
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20 | * [**] not implemented yet |
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21 | */ |
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22 | |
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23 | #define notimpl(s) printk(s##" not implemented"); |
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24 | #define privify_mov_from_cflg_m(i) do { notimpl("mov from ar.cflg"); } while(0) |
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25 | #define privify_mov_from_cflg_i(i) do { notimpl("mov from ar.cflg"); } while(0) |
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26 | #define privify_mov_from_kr_m(i) do { i.M31.x6 = 0x2a; i.M29.r2 = i.M31.r1 + 64; } while(0) |
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27 | #define privify_mov_from_kr_i(i) do { i.I28.x6 = 0x2a; i.I26.r2 = i.I28.r1 + 64; } while(0) |
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28 | #define privify_fc(i) do { i.M28.x6 = 0x34; i.M28.r3 = i.M28.r3 + 64; } while(0) |
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29 | #define privify_thash(i) do { i.M46.x6 = 0x1f; i.M46.r3 += 64; } while(0) |
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30 | #define privify_ttag(i) do { i.M46.x6 = 0x1f; i.M46.r3 += 64; } while(0) |
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31 | #define privify_mov_from_cpuid(i) do { i.M43.x6 = 0x10; i.M43.r1 += 64; } while(0) |
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32 | #define privify_mov_from_pmd(i) do { notimpl("mov from pmd"); } while(0) |
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33 | #define privify_cover(x) do { x.B8.x6 = 0x0; x.B9.imm20 = 0xfffff; x.B9.i = 0x1; } while(0) |
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34 | |
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