| 1 | #include <linux/config.h> |
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| 2 | |
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| 3 | /* |
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| 4 | * Preserved registers that are shared between code in ivt.S and |
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| 5 | * entry.S. Be careful not to step on these! |
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| 6 | */ |
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| 7 | #define PRED_LEAVE_SYSCALL 1 /* TRUE iff leave from syscall */ |
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| 8 | #define PRED_KERNEL_STACK 2 /* returning to kernel-stacks? */ |
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| 9 | #define PRED_USER_STACK 3 /* returning to user-stacks? */ |
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| 10 | #define PRED_SYSCALL 4 /* inside a system call? */ |
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| 11 | #define PRED_NON_SYSCALL 5 /* complement of PRED_SYSCALL */ |
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| 12 | |
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| 13 | #ifdef __ASSEMBLY__ |
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| 14 | # define PASTE2(x,y) x##y |
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| 15 | # define PASTE(x,y) PASTE2(x,y) |
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| 16 | |
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| 17 | # define pLvSys PASTE(p,PRED_LEAVE_SYSCALL) |
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| 18 | # define pKStk PASTE(p,PRED_KERNEL_STACK) |
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| 19 | # define pUStk PASTE(p,PRED_USER_STACK) |
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| 20 | # define pSys PASTE(p,PRED_SYSCALL) |
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| 21 | # define pNonSys PASTE(p,PRED_NON_SYSCALL) |
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| 22 | #endif |
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| 23 | |
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| 24 | #define PT(f) (IA64_PT_REGS_##f##_OFFSET) |
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| 25 | #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET) |
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| 26 | #ifdef XEN |
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| 27 | #define VPD(f) (VPD_##f##_START_OFFSET) |
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| 28 | #endif |
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| 29 | |
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| 30 | #define PT_REGS_SAVES(off) \ |
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| 31 | .unwabi 3, 'i'; \ |
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| 32 | .fframe IA64_PT_REGS_SIZE+16+(off); \ |
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| 33 | .spillsp rp, PT(CR_IIP)+16+(off); \ |
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| 34 | .spillsp ar.pfs, PT(CR_IFS)+16+(off); \ |
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| 35 | .spillsp ar.unat, PT(AR_UNAT)+16+(off); \ |
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| 36 | .spillsp ar.fpsr, PT(AR_FPSR)+16+(off); \ |
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| 37 | .spillsp pr, PT(PR)+16+(off); |
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| 38 | |
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| 39 | #define PT_REGS_UNWIND_INFO(off) \ |
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| 40 | .prologue; \ |
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| 41 | PT_REGS_SAVES(off); \ |
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| 42 | .body |
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| 43 | |
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| 44 | #define SWITCH_STACK_SAVES(off) \ |
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| 45 | .savesp ar.unat,SW(CALLER_UNAT)+16+(off); \ |
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| 46 | .savesp ar.fpsr,SW(AR_FPSR)+16+(off); \ |
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| 47 | .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off); \ |
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| 48 | .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \ |
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| 49 | .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off); \ |
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| 50 | .spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off); \ |
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| 51 | .spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off); \ |
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| 52 | .spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off); \ |
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| 53 | .spillsp f24,SW(F24)+16+(off); .spillsp f25,SW(F25)+16+(off); \ |
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| 54 | .spillsp f26,SW(F26)+16+(off); .spillsp f27,SW(F27)+16+(off); \ |
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| 55 | .spillsp f28,SW(F28)+16+(off); .spillsp f29,SW(F29)+16+(off); \ |
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| 56 | .spillsp f30,SW(F30)+16+(off); .spillsp f31,SW(F31)+16+(off); \ |
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| 57 | .spillsp r4,SW(R4)+16+(off); .spillsp r5,SW(R5)+16+(off); \ |
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| 58 | .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off); \ |
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| 59 | .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off); \ |
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| 60 | .spillsp b2,SW(B2)+16+(off); .spillsp b3,SW(B3)+16+(off); \ |
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| 61 | .spillsp b4,SW(B4)+16+(off); .spillsp b5,SW(B5)+16+(off); \ |
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| 62 | .spillsp ar.pfs,SW(AR_PFS)+16+(off); .spillsp ar.lc,SW(AR_LC)+16+(off); \ |
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| 63 | .spillsp @priunat,SW(AR_UNAT)+16+(off); \ |
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| 64 | .spillsp ar.rnat,SW(AR_RNAT)+16+(off); \ |
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| 65 | .spillsp ar.bspstore,SW(AR_BSPSTORE)+16+(off); \ |
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| 66 | .spillsp pr,SW(PR)+16+(off) |
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| 67 | |
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| 68 | #define DO_SAVE_SWITCH_STACK \ |
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| 69 | movl r28=1f; \ |
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| 70 | ;; \ |
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| 71 | .fframe IA64_SWITCH_STACK_SIZE; \ |
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| 72 | adds sp=-IA64_SWITCH_STACK_SIZE,sp; \ |
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| 73 | mov.ret.sptk b7=r28,1f; \ |
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| 74 | SWITCH_STACK_SAVES(0); \ |
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| 75 | br.cond.sptk.many save_switch_stack; \ |
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| 76 | 1: |
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| 77 | |
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| 78 | #define DO_LOAD_SWITCH_STACK \ |
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| 79 | movl r28=1f; \ |
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| 80 | ;; \ |
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| 81 | invala; \ |
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| 82 | mov.ret.sptk b7=r28,1f; \ |
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| 83 | br.cond.sptk.many load_switch_stack; \ |
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| 84 | 1: .restore sp; \ |
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| 85 | adds sp=IA64_SWITCH_STACK_SIZE,sp |
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