1 | /* |
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2 | * QEMU Sparc SLAVIO serial port emulation |
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3 | * |
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4 | * Copyright (c) 2003-2005 Fabrice Bellard |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
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7 | * of this software and associated documentation files (the "Software"), to deal |
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8 | * in the Software without restriction, including without limitation the rights |
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9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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10 | * copies of the Software, and to permit persons to whom the Software is |
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11 | * furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice shall be included in |
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14 | * all copies or substantial portions of the Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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22 | * THE SOFTWARE. |
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23 | */ |
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24 | #include "vl.h" |
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25 | /* debug serial */ |
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26 | //#define DEBUG_SERIAL |
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27 | |
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28 | /* debug keyboard */ |
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29 | //#define DEBUG_KBD |
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30 | |
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31 | /* debug mouse */ |
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32 | //#define DEBUG_MOUSE |
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33 | |
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34 | /* |
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35 | * This is the serial port, mouse and keyboard part of chip STP2001 |
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36 | * (Slave I/O), also produced as NCR89C105. See |
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37 | * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt |
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38 | * |
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39 | * The serial ports implement full AMD AM8530 or Zilog Z8530 chips, |
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40 | * mouse and keyboard ports don't implement all functions and they are |
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41 | * only asynchronous. There is no DMA. |
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42 | * |
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43 | */ |
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44 | |
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45 | #ifdef DEBUG_SERIAL |
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46 | #define SER_DPRINTF(fmt, args...) \ |
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47 | do { printf("SER: " fmt , ##args); } while (0) |
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48 | #define pic_set_irq(irq, level) \ |
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49 | do { printf("SER: set_irq(%d): %d\n", (irq), (level)); pic_set_irq((irq),(level));} while (0) |
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50 | #else |
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51 | #define SER_DPRINTF(fmt, args...) |
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52 | #endif |
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53 | #ifdef DEBUG_KBD |
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54 | #define KBD_DPRINTF(fmt, args...) \ |
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55 | do { printf("KBD: " fmt , ##args); } while (0) |
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56 | #else |
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57 | #define KBD_DPRINTF(fmt, args...) |
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58 | #endif |
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59 | #ifdef DEBUG_MOUSE |
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60 | #define MS_DPRINTF(fmt, args...) \ |
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61 | do { printf("SER: " fmt , ##args); } while (0) |
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62 | #else |
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63 | #define MS_DPRINTF(fmt, args...) |
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64 | #endif |
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65 | |
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66 | typedef enum { |
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67 | chn_a, chn_b, |
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68 | } chn_id_t; |
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69 | |
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70 | typedef enum { |
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71 | ser, kbd, mouse, |
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72 | } chn_type_t; |
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73 | |
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74 | #define KBD_QUEUE_SIZE 256 |
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75 | |
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76 | typedef struct { |
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77 | uint8_t data[KBD_QUEUE_SIZE]; |
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78 | int rptr, wptr, count; |
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79 | } KBDQueue; |
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80 | |
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81 | typedef struct ChannelState { |
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82 | int irq; |
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83 | int reg; |
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84 | int rxint, txint; |
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85 | chn_id_t chn; // this channel, A (base+4) or B (base+0) |
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86 | chn_type_t type; |
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87 | struct ChannelState *otherchn; |
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88 | uint8_t rx, tx, wregs[16], rregs[16]; |
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89 | KBDQueue queue; |
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90 | CharDriverState *chr; |
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91 | } ChannelState; |
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92 | |
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93 | struct SerialState { |
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94 | struct ChannelState chn[2]; |
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95 | }; |
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96 | |
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97 | #define SERIAL_MAXADDR 7 |
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98 | |
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99 | static void handle_kbd_command(ChannelState *s, int val); |
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100 | static int serial_can_receive(void *opaque); |
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101 | static void serial_receive_byte(ChannelState *s, int ch); |
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102 | |
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103 | static void put_queue(void *opaque, int b) |
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104 | { |
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105 | ChannelState *s = opaque; |
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106 | KBDQueue *q = &s->queue; |
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107 | |
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108 | KBD_DPRINTF("put: 0x%02x\n", b); |
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109 | if (q->count >= KBD_QUEUE_SIZE) |
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110 | return; |
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111 | q->data[q->wptr] = b; |
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112 | if (++q->wptr == KBD_QUEUE_SIZE) |
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113 | q->wptr = 0; |
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114 | q->count++; |
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115 | serial_receive_byte(s, 0); |
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116 | } |
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117 | |
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118 | static uint32_t get_queue(void *opaque) |
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119 | { |
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120 | ChannelState *s = opaque; |
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121 | KBDQueue *q = &s->queue; |
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122 | int val; |
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123 | |
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124 | if (q->count == 0) { |
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125 | return 0; |
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126 | } else { |
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127 | val = q->data[q->rptr]; |
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128 | if (++q->rptr == KBD_QUEUE_SIZE) |
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129 | q->rptr = 0; |
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130 | q->count--; |
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131 | } |
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132 | KBD_DPRINTF("get 0x%02x\n", val); |
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133 | if (q->count > 0) |
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134 | serial_receive_byte(s, 0); |
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135 | return val; |
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136 | } |
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137 | |
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138 | static void slavio_serial_update_irq(ChannelState *s) |
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139 | { |
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140 | if ((s->wregs[1] & 1) && // interrupts enabled |
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141 | (((s->wregs[1] & 2) && s->txint == 1) || // tx ints enabled, pending |
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142 | ((((s->wregs[1] & 0x18) == 8) || ((s->wregs[1] & 0x18) == 0x10)) && |
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143 | s->rxint == 1) || // rx ints enabled, pending |
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144 | ((s->wregs[15] & 0x80) && (s->rregs[0] & 0x80)))) { // break int e&p |
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145 | pic_set_irq(s->irq, 1); |
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146 | } else { |
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147 | pic_set_irq(s->irq, 0); |
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148 | } |
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149 | } |
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150 | |
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151 | static void slavio_serial_reset_chn(ChannelState *s) |
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152 | { |
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153 | int i; |
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154 | |
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155 | s->reg = 0; |
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156 | for (i = 0; i < SERIAL_MAXADDR; i++) { |
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157 | s->rregs[i] = 0; |
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158 | s->wregs[i] = 0; |
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159 | } |
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160 | s->wregs[4] = 4; |
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161 | s->wregs[9] = 0xc0; |
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162 | s->wregs[11] = 8; |
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163 | s->wregs[14] = 0x30; |
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164 | s->wregs[15] = 0xf8; |
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165 | s->rregs[0] = 0x44; |
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166 | s->rregs[1] = 6; |
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167 | |
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168 | s->rx = s->tx = 0; |
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169 | s->rxint = s->txint = 0; |
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170 | } |
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171 | |
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172 | static void slavio_serial_reset(void *opaque) |
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173 | { |
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174 | SerialState *s = opaque; |
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175 | slavio_serial_reset_chn(&s->chn[0]); |
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176 | slavio_serial_reset_chn(&s->chn[1]); |
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177 | } |
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178 | |
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179 | static inline void clr_rxint(ChannelState *s) |
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180 | { |
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181 | s->rxint = 0; |
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182 | if (s->chn == 0) |
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183 | s->rregs[3] &= ~0x20; |
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184 | else { |
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185 | s->otherchn->rregs[3] &= ~4; |
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186 | } |
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187 | slavio_serial_update_irq(s); |
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188 | } |
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189 | |
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190 | static inline void set_rxint(ChannelState *s) |
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191 | { |
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192 | s->rxint = 1; |
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193 | if (s->chn == 0) |
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194 | s->rregs[3] |= 0x20; |
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195 | else { |
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196 | s->otherchn->rregs[3] |= 4; |
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197 | } |
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198 | slavio_serial_update_irq(s); |
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199 | } |
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200 | |
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201 | static inline void clr_txint(ChannelState *s) |
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202 | { |
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203 | s->txint = 0; |
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204 | if (s->chn == 0) |
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205 | s->rregs[3] &= ~0x10; |
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206 | else { |
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207 | s->otherchn->rregs[3] &= ~2; |
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208 | } |
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209 | slavio_serial_update_irq(s); |
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210 | } |
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211 | |
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212 | static inline void set_txint(ChannelState *s) |
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213 | { |
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214 | s->txint = 1; |
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215 | if (s->chn == 0) |
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216 | s->rregs[3] |= 0x10; |
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217 | else { |
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218 | s->otherchn->rregs[3] |= 2; |
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219 | } |
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220 | slavio_serial_update_irq(s); |
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221 | } |
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222 | |
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223 | static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
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224 | { |
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225 | SerialState *ser = opaque; |
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226 | ChannelState *s; |
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227 | uint32_t saddr; |
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228 | int newreg, channel; |
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229 | |
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230 | val &= 0xff; |
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231 | saddr = (addr & 3) >> 1; |
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232 | channel = (addr & SERIAL_MAXADDR) >> 2; |
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233 | s = &ser->chn[channel]; |
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234 | switch (saddr) { |
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235 | case 0: |
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236 | SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", channel? 'b' : 'a', s->reg, val & 0xff); |
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237 | newreg = 0; |
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238 | switch (s->reg) { |
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239 | case 0: |
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240 | newreg = val & 7; |
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241 | val &= 0x38; |
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242 | switch (val) { |
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243 | case 8: |
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244 | newreg |= 0x8; |
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245 | break; |
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246 | case 0x20: |
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247 | clr_rxint(s); |
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248 | break; |
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249 | case 0x28: |
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250 | clr_txint(s); |
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251 | break; |
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252 | case 0x38: |
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253 | clr_rxint(s); |
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254 | clr_txint(s); |
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255 | break; |
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256 | default: |
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257 | break; |
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258 | } |
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259 | break; |
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260 | case 1 ... 8: |
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261 | case 10 ... 15: |
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262 | s->wregs[s->reg] = val; |
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263 | break; |
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264 | case 9: |
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265 | switch (val & 0xc0) { |
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266 | case 0: |
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267 | default: |
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268 | break; |
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269 | case 0x40: |
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270 | slavio_serial_reset_chn(&ser->chn[1]); |
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271 | return; |
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272 | case 0x80: |
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273 | slavio_serial_reset_chn(&ser->chn[0]); |
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274 | return; |
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275 | case 0xc0: |
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276 | slavio_serial_reset(ser); |
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277 | return; |
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278 | } |
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279 | break; |
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280 | default: |
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281 | break; |
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282 | } |
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283 | if (s->reg == 0) |
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284 | s->reg = newreg; |
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285 | else |
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286 | s->reg = 0; |
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287 | break; |
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288 | case 1: |
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289 | SER_DPRINTF("Write channel %c, ch %d\n", channel? 'b' : 'a', val); |
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290 | if (s->wregs[5] & 8) { // tx enabled |
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291 | s->tx = val; |
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292 | if (s->chr) |
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293 | qemu_chr_write(s->chr, &s->tx, 1); |
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294 | else if (s->type == kbd) { |
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295 | handle_kbd_command(s, val); |
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296 | } |
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297 | s->txint = 1; |
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298 | s->rregs[0] |= 4; // Tx buffer empty |
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299 | s->rregs[1] |= 1; // All sent |
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300 | set_txint(s); |
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301 | slavio_serial_update_irq(s); |
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302 | } |
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303 | break; |
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304 | default: |
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305 | break; |
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306 | } |
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307 | } |
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308 | |
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309 | static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr) |
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310 | { |
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311 | SerialState *ser = opaque; |
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312 | ChannelState *s; |
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313 | uint32_t saddr; |
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314 | uint32_t ret; |
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315 | int channel; |
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316 | |
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317 | saddr = (addr & 3) >> 1; |
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318 | channel = (addr & SERIAL_MAXADDR) >> 2; |
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319 | s = &ser->chn[channel]; |
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320 | switch (saddr) { |
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321 | case 0: |
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322 | SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", channel? 'b' : 'a', s->reg, s->rregs[s->reg]); |
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323 | ret = s->rregs[s->reg]; |
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324 | s->reg = 0; |
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325 | return ret; |
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326 | case 1: |
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327 | s->rregs[0] &= ~1; |
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328 | clr_rxint(s); |
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329 | if (s->type == kbd) |
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330 | ret = get_queue(s); |
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331 | else |
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332 | ret = s->rx; |
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333 | SER_DPRINTF("Read channel %c, ch %d\n", channel? 'b' : 'a', ret); |
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334 | return ret; |
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335 | default: |
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336 | break; |
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337 | } |
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338 | return 0; |
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339 | } |
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340 | |
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341 | static int serial_can_receive(void *opaque) |
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342 | { |
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343 | ChannelState *s = opaque; |
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344 | if (((s->wregs[3] & 1) == 0) // Rx not enabled |
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345 | || ((s->rregs[0] & 1) == 1)) // char already available |
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346 | return 0; |
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347 | else |
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348 | return 1; |
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349 | } |
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350 | |
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351 | static void serial_receive_byte(ChannelState *s, int ch) |
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352 | { |
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353 | SER_DPRINTF("put ch %d\n", ch); |
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354 | s->rregs[0] |= 1; |
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355 | s->rx = ch; |
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356 | set_rxint(s); |
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357 | } |
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358 | |
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359 | static void serial_receive_break(ChannelState *s) |
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360 | { |
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361 | s->rregs[0] |= 0x80; |
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362 | slavio_serial_update_irq(s); |
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363 | } |
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364 | |
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365 | static void serial_receive1(void *opaque, const uint8_t *buf, int size) |
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366 | { |
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367 | ChannelState *s = opaque; |
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368 | serial_receive_byte(s, buf[0]); |
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369 | } |
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370 | |
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371 | static void serial_event(void *opaque, int event) |
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372 | { |
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373 | ChannelState *s = opaque; |
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374 | if (event == CHR_EVENT_BREAK) |
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375 | serial_receive_break(s); |
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376 | } |
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377 | |
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378 | static CPUReadMemoryFunc *slavio_serial_mem_read[3] = { |
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379 | slavio_serial_mem_readb, |
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380 | slavio_serial_mem_readb, |
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381 | slavio_serial_mem_readb, |
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382 | }; |
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383 | |
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384 | static CPUWriteMemoryFunc *slavio_serial_mem_write[3] = { |
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385 | slavio_serial_mem_writeb, |
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386 | slavio_serial_mem_writeb, |
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387 | slavio_serial_mem_writeb, |
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388 | }; |
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389 | |
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390 | static void slavio_serial_save_chn(QEMUFile *f, ChannelState *s) |
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391 | { |
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392 | qemu_put_be32s(f, &s->irq); |
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393 | qemu_put_be32s(f, &s->reg); |
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394 | qemu_put_be32s(f, &s->rxint); |
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395 | qemu_put_be32s(f, &s->txint); |
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396 | qemu_put_8s(f, &s->rx); |
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397 | qemu_put_8s(f, &s->tx); |
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398 | qemu_put_buffer(f, s->wregs, 16); |
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399 | qemu_put_buffer(f, s->rregs, 16); |
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400 | } |
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401 | |
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402 | static void slavio_serial_save(QEMUFile *f, void *opaque) |
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403 | { |
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404 | SerialState *s = opaque; |
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405 | |
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406 | slavio_serial_save_chn(f, &s->chn[0]); |
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407 | slavio_serial_save_chn(f, &s->chn[1]); |
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408 | } |
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409 | |
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410 | static int slavio_serial_load_chn(QEMUFile *f, ChannelState *s, int version_id) |
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411 | { |
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412 | if (version_id != 1) |
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413 | return -EINVAL; |
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414 | |
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415 | qemu_get_be32s(f, &s->irq); |
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416 | qemu_get_be32s(f, &s->reg); |
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417 | qemu_get_be32s(f, &s->rxint); |
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418 | qemu_get_be32s(f, &s->txint); |
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419 | qemu_get_8s(f, &s->rx); |
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420 | qemu_get_8s(f, &s->tx); |
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421 | qemu_get_buffer(f, s->wregs, 16); |
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422 | qemu_get_buffer(f, s->rregs, 16); |
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423 | return 0; |
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424 | } |
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425 | |
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426 | static int slavio_serial_load(QEMUFile *f, void *opaque, int version_id) |
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427 | { |
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428 | SerialState *s = opaque; |
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429 | int ret; |
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430 | |
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431 | ret = slavio_serial_load_chn(f, &s->chn[0], version_id); |
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432 | if (ret != 0) |
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433 | return ret; |
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434 | ret = slavio_serial_load_chn(f, &s->chn[1], version_id); |
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435 | return ret; |
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436 | |
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437 | } |
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438 | |
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439 | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2) |
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440 | { |
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441 | int slavio_serial_io_memory, i; |
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442 | SerialState *s; |
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443 | |
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444 | s = qemu_mallocz(sizeof(SerialState)); |
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445 | if (!s) |
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446 | return NULL; |
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447 | |
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448 | slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, slavio_serial_mem_write, s); |
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449 | cpu_register_physical_memory(base, SERIAL_MAXADDR, slavio_serial_io_memory); |
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450 | |
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451 | s->chn[0].chr = chr1; |
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452 | s->chn[1].chr = chr2; |
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453 | |
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454 | for (i = 0; i < 2; i++) { |
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455 | s->chn[i].irq = irq; |
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456 | s->chn[i].chn = 1 - i; |
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457 | s->chn[i].type = ser; |
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458 | if (s->chn[i].chr) { |
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459 | qemu_chr_add_read_handler(s->chn[i].chr, serial_can_receive, serial_receive1, &s->chn[i]); |
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460 | qemu_chr_add_event_handler(s->chn[i].chr, serial_event); |
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461 | } |
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462 | } |
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463 | s->chn[0].otherchn = &s->chn[1]; |
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464 | s->chn[1].otherchn = &s->chn[0]; |
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465 | register_savevm("slavio_serial", base, 1, slavio_serial_save, slavio_serial_load, s); |
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466 | qemu_register_reset(slavio_serial_reset, s); |
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467 | slavio_serial_reset(s); |
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468 | return s; |
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469 | } |
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470 | |
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471 | static const uint8_t keycodes[128] = { |
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472 | 127, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 43, 53, |
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473 | 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 89, 76, 77, 78, |
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474 | 79, 80, 81, 82, 83, 84, 85, 86, 87, 42, 99, 88, 100, 101, 102, 103, |
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475 | 104, 105, 106, 107, 108, 109, 110, 47, 19, 121, 119, 5, 6, 8, 10, 12, |
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476 | 14, 16, 17, 18, 7, 98, 23, 68, 69, 70, 71, 91, 92, 93, 125, 112, |
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477 | 113, 114, 94, 50, 0, 0, 124, 9, 11, 0, 0, 0, 0, 0, 0, 0, |
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478 | 90, 0, 46, 22, 13, 111, 52, 20, 96, 24, 28, 74, 27, 123, 44, 66, |
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479 | 0, 45, 2, 4, 48, 0, 0, 21, 0, 0, 0, 0, 0, 120, 122, 67, |
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480 | }; |
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481 | |
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482 | static void sunkbd_event(void *opaque, int ch) |
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483 | { |
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484 | ChannelState *s = opaque; |
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485 | int release = ch & 0x80; |
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486 | |
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487 | ch = keycodes[ch & 0x7f]; |
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488 | KBD_DPRINTF("Keycode %d (%s)\n", ch, release? "release" : "press"); |
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489 | put_queue(s, ch | release); |
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490 | } |
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491 | |
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492 | static void handle_kbd_command(ChannelState *s, int val) |
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493 | { |
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494 | KBD_DPRINTF("Command %d\n", val); |
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495 | switch (val) { |
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496 | case 1: // Reset, return type code |
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497 | put_queue(s, 0xff); |
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498 | put_queue(s, 5); // Type 5 |
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499 | break; |
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500 | case 7: // Query layout |
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501 | put_queue(s, 0xfe); |
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502 | put_queue(s, 0x20); // XXX, layout? |
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503 | break; |
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504 | default: |
---|
505 | break; |
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506 | } |
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507 | } |
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508 | |
---|
509 | static void sunmouse_event(void *opaque, |
---|
510 | int dx, int dy, int dz, int buttons_state) |
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511 | { |
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512 | ChannelState *s = opaque; |
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513 | int ch; |
---|
514 | |
---|
515 | // XXX |
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516 | ch = 0x42; |
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517 | serial_receive_byte(s, ch); |
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518 | } |
---|
519 | |
---|
520 | void slavio_serial_ms_kbd_init(int base, int irq) |
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521 | { |
---|
522 | int slavio_serial_io_memory, i; |
---|
523 | SerialState *s; |
---|
524 | |
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525 | s = qemu_mallocz(sizeof(SerialState)); |
---|
526 | if (!s) |
---|
527 | return; |
---|
528 | for (i = 0; i < 2; i++) { |
---|
529 | s->chn[i].irq = irq; |
---|
530 | s->chn[i].chn = 1 - i; |
---|
531 | s->chn[i].chr = NULL; |
---|
532 | } |
---|
533 | s->chn[0].otherchn = &s->chn[1]; |
---|
534 | s->chn[1].otherchn = &s->chn[0]; |
---|
535 | s->chn[0].type = mouse; |
---|
536 | s->chn[1].type = kbd; |
---|
537 | |
---|
538 | slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, slavio_serial_mem_write, s); |
---|
539 | cpu_register_physical_memory(base, SERIAL_MAXADDR, slavio_serial_io_memory); |
---|
540 | |
---|
541 | qemu_add_mouse_event_handler(sunmouse_event, &s->chn[0], 0); |
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542 | qemu_add_kbd_event_handler(sunkbd_event, &s->chn[1]); |
---|
543 | qemu_register_reset(slavio_serial_reset, s); |
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544 | slavio_serial_reset(s); |
---|
545 | } |
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