1 | /* |
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2 | * machine.h: Intel CPU specific definitions |
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3 | * |
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4 | * Leendert van Doorn, leendert@watson.ibm.com |
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5 | * Copyright (c) 2005, International Business Machines Corporation. |
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6 | * |
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7 | * This program is free software; you can redistribute it and/or modify it |
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8 | * under the terms and conditions of the GNU General Public License, |
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9 | * version 2, as published by the Free Software Foundation. |
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10 | * |
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11 | * This program is distributed in the hope it will be useful, but WITHOUT |
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12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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14 | * more details. |
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15 | * |
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16 | * You should have received a copy of the GNU General Public License along with |
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17 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
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18 | * Place - Suite 330, Boston, MA 02111-1307 USA. |
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19 | */ |
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20 | #ifndef __MACHINE_H__ |
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21 | #define __MACHINE_H__ |
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22 | |
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23 | /* the size of our stack (4KB) */ |
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24 | #define STACK_SIZE 8192 |
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25 | |
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26 | #define TSS_SELECTOR 0x08 |
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27 | #define CODE_SELECTOR 0x10 |
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28 | #define DATA_SELECTOR 0x18 |
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29 | |
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30 | #define CR0_PE (1 << 0) |
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31 | #define CR0_EM (1 << 2) |
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32 | #define CR0_TS (1 << 3) |
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33 | #define CR0_NE (1 << 5) |
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34 | #define CR0_PG (1 << 31) |
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35 | |
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36 | #define CR4_VME (1 << 0) |
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37 | #define CR4_PVI (1 << 1) |
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38 | #define CR4_PSE (1 << 4) |
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39 | #define CR4_PAE (1 << 5) |
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40 | |
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41 | #define EFLAGS_ZF (1 << 6) |
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42 | #define EFLAGS_TF (1 << 8) |
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43 | #define EFLAGS_IF (1 << 9) |
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44 | #define EFLAGS_DF (1 << 10) |
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45 | #define EFLAGS_IOPL (3 << 12) |
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46 | #define EFLAGS_VM ((1 << 17) | EFLAGS_IOPL) |
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47 | #define EFLAGS_VIF (1 << 19) |
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48 | #define EFLAGS_VIP (1 << 20) |
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49 | |
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50 | #define LOG_PGSIZE 12 /* log2(page size) */ |
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51 | #define LOG_PDSIZE 22 /* log2(page directory size) */ |
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52 | |
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53 | /* Derived constants */ |
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54 | #define PGSIZE (1 << LOG_PGSIZE) /* page size */ |
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55 | #define PGMASK (~(PGSIZE - 1)) /* page mask */ |
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56 | #define LPGSIZE (1 << LOG_PDSIZE) /* large page size */ |
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57 | #define LPGMASK (~(LPGSIZE - 1)) /* large page mask */ |
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58 | |
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59 | #ifdef TEST |
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60 | #define PTE_P (1 << 0) /* Present */ |
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61 | #define PTE_RW (1 << 1) /* Read/Write */ |
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62 | #define PTE_US (1 << 2) /* User/Supervisor */ |
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63 | #define PTE_PS (1 << 7) /* Page Size */ |
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64 | #endif |
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65 | |
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66 | /* Programmable Interrupt Contoller (PIC) defines */ |
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67 | #define PIC_MASTER 0x20 |
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68 | #define PIC_SLAVE 0xA0 |
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69 | |
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70 | #define PIC_CMD 0 /* command */ |
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71 | #define PIC_ISR 0 /* interrupt status */ |
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72 | #define PIC_IMR 1 /* interrupt mask */ |
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73 | |
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74 | |
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75 | #ifndef __ASSEMBLY__ |
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76 | |
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77 | struct dtr { |
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78 | unsigned short size; |
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79 | unsigned long base __attribute__ ((packed)); |
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80 | }; |
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81 | |
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82 | struct tss { |
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83 | unsigned short prev_link; |
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84 | unsigned short _1; |
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85 | unsigned long esp0; |
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86 | unsigned short ss0; |
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87 | unsigned short _2; |
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88 | unsigned long esp1; |
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89 | unsigned short ss1; |
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90 | unsigned short _3; |
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91 | unsigned long esp2; |
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92 | unsigned short ss2; |
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93 | unsigned short _4; |
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94 | unsigned long cr3; |
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95 | unsigned long eip; |
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96 | unsigned long eflags; |
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97 | unsigned long eax; |
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98 | unsigned long ecx; |
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99 | unsigned long edx; |
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100 | unsigned long ebx; |
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101 | unsigned long esi; |
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102 | unsigned long edi; |
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103 | unsigned long esp; |
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104 | unsigned long ebp; |
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105 | unsigned long es; |
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106 | unsigned long cs; |
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107 | unsigned long ss; |
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108 | unsigned long ds; |
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109 | unsigned long fs; |
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110 | unsigned long gs; |
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111 | unsigned short ldt_segment; |
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112 | unsigned short _5; |
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113 | unsigned short _6; |
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114 | unsigned short iomap_base; |
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115 | #ifdef ENABLE_VME |
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116 | unsigned long int_redir[8]; |
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117 | #endif |
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118 | unsigned char iomap[8192]; |
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119 | }; |
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120 | |
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121 | static inline void |
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122 | outw(unsigned short addr, unsigned short val) |
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123 | { |
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124 | __asm__ __volatile__ ("outw %%ax, %%dx" :: "d"(addr), "a"(val)); |
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125 | } |
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126 | |
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127 | static inline void |
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128 | outb(unsigned short addr, unsigned char val) |
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129 | { |
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130 | __asm__ __volatile__ ("outb %%al, %%dx" :: "d"(addr), "a"(val)); |
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131 | } |
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132 | |
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133 | static inline unsigned char |
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134 | inb(unsigned short addr) |
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135 | { |
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136 | unsigned char val; |
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137 | |
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138 | __asm__ __volatile__ ("inb %w1,%0" : "=a" (val) : "Nd" (addr)); |
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139 | return val; |
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140 | } |
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141 | |
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142 | static inline unsigned |
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143 | get_cmos(int reg) |
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144 | { |
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145 | outb(0x70, reg); |
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146 | return inb(0x71); |
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147 | } |
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148 | |
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149 | static inline unsigned |
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150 | get_cr0(void) |
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151 | { |
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152 | unsigned rv; |
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153 | __asm__ __volatile__("movl %%cr0, %0" : "=r"(rv)); |
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154 | return rv; |
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155 | } |
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156 | |
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157 | static inline void |
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158 | set_cr0(unsigned value) |
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159 | { |
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160 | __asm__ __volatile__( |
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161 | "movl %0, %%cr0\n" |
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162 | "jmp 1f\n" |
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163 | "1: nop\n" |
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164 | : /* no outputs */ |
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165 | : "r"(value) |
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166 | ); |
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167 | } |
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168 | |
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169 | static inline unsigned |
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170 | get_cr2(void) |
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171 | { |
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172 | unsigned rv; |
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173 | |
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174 | __asm__ __volatile__("movl %%cr2, %0" : "=r"(rv)); |
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175 | return rv; |
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176 | } |
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177 | |
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178 | static inline unsigned |
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179 | get_cr4(void) |
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180 | { |
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181 | unsigned rv; |
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182 | __asm__ __volatile__("movl %%cr4, %0" : "=r"(rv)); |
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183 | return rv; |
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184 | } |
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185 | |
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186 | static inline void |
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187 | set_cr3(unsigned addr) |
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188 | { |
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189 | __asm__ __volatile__("movl %0, %%cr3" : /* no outputs */ : "r"(addr)); |
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190 | } |
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191 | |
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192 | static inline void |
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193 | set_cr4(unsigned value) |
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194 | { |
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195 | __asm__ __volatile__("movl %0, %%cr4" : /* no outputs */ : "r"(value)); |
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196 | } |
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197 | |
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198 | #ifdef TEST |
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199 | static inline void |
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200 | breakpoint(void) |
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201 | { |
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202 | outw(0x8A00, 0x8AE0); |
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203 | } |
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204 | #endif /* TEST */ |
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205 | |
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206 | #endif /* __ASSEMBLY__ */ |
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207 | |
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208 | #endif /* __MACHINE_H__ */ |
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209 | |
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