1 | /* |
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2 | * linux/arch/x86_64/kernel/irq.c |
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3 | * |
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4 | * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar |
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5 | * |
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6 | * This file contains the lowest level x86_64-specific interrupt |
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7 | * entry and irq statistics code. All the remaining irq logic is |
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8 | * done by the generic kernel/irq/ code and in the |
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9 | * x86_64-specific irq controller code. (e.g. i8259.c and |
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10 | * io_apic.c.) |
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11 | */ |
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12 | |
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13 | #include <linux/kernel_stat.h> |
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14 | #include <linux/interrupt.h> |
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15 | #include <linux/seq_file.h> |
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16 | #include <linux/module.h> |
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17 | #include <linux/delay.h> |
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18 | #include <asm/uaccess.h> |
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19 | #include <asm/io_apic.h> |
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20 | #include <asm/idle.h> |
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21 | |
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22 | atomic_t irq_err_count; |
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23 | #ifdef CONFIG_X86_IO_APIC |
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24 | #ifdef APIC_MISMATCH_DEBUG |
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25 | atomic_t irq_mis_count; |
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26 | #endif |
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27 | #endif |
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28 | |
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29 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
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30 | /* |
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31 | * Probabilistic stack overflow check: |
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32 | * |
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33 | * Only check the stack in process context, because everything else |
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34 | * runs on the big interrupt stacks. Checking reliably is too expensive, |
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35 | * so we just check from interrupts. |
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36 | */ |
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37 | static inline void stack_overflow_check(struct pt_regs *regs) |
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38 | { |
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39 | u64 curbase = (u64) current->thread_info; |
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40 | static unsigned long warned = -60*HZ; |
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41 | |
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42 | if (regs->rsp >= curbase && regs->rsp <= curbase + THREAD_SIZE && |
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43 | regs->rsp < curbase + sizeof(struct thread_info) + 128 && |
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44 | time_after(jiffies, warned + 60*HZ)) { |
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45 | printk("do_IRQ: %s near stack overflow (cur:%Lx,rsp:%lx)\n", |
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46 | current->comm, curbase, regs->rsp); |
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47 | show_stack(NULL,NULL); |
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48 | warned = jiffies; |
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49 | } |
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50 | } |
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51 | #endif |
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52 | |
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53 | /* |
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54 | * Generic, controller-independent functions: |
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55 | */ |
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56 | |
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57 | int show_interrupts(struct seq_file *p, void *v) |
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58 | { |
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59 | int i = *(loff_t *) v, j; |
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60 | struct irqaction * action; |
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61 | unsigned long flags; |
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62 | |
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63 | if (i == 0) { |
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64 | seq_printf(p, " "); |
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65 | for_each_online_cpu(j) |
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66 | seq_printf(p, "CPU%-8d",j); |
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67 | seq_putc(p, '\n'); |
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68 | } |
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69 | |
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70 | if (i < NR_IRQS) { |
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71 | spin_lock_irqsave(&irq_desc[i].lock, flags); |
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72 | action = irq_desc[i].action; |
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73 | if (!action) |
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74 | goto skip; |
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75 | seq_printf(p, "%3d: ",i); |
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76 | #ifndef CONFIG_SMP |
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77 | seq_printf(p, "%10u ", kstat_irqs(i)); |
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78 | #else |
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79 | for_each_online_cpu(j) |
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80 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
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81 | #endif |
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82 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
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83 | |
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84 | seq_printf(p, " %s", action->name); |
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85 | for (action=action->next; action; action = action->next) |
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86 | seq_printf(p, ", %s", action->name); |
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87 | seq_putc(p, '\n'); |
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88 | skip: |
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89 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); |
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90 | } else if (i == NR_IRQS) { |
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91 | seq_printf(p, "NMI: "); |
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92 | for_each_online_cpu(j) |
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93 | seq_printf(p, "%10u ", cpu_pda(j)->__nmi_count); |
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94 | seq_putc(p, '\n'); |
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95 | #ifdef CONFIG_X86_LOCAL_APIC |
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96 | seq_printf(p, "LOC: "); |
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97 | for_each_online_cpu(j) |
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98 | seq_printf(p, "%10u ", cpu_pda(j)->apic_timer_irqs); |
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99 | seq_putc(p, '\n'); |
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100 | #endif |
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101 | seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); |
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102 | #ifdef CONFIG_X86_IO_APIC |
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103 | #ifdef APIC_MISMATCH_DEBUG |
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104 | seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count)); |
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105 | #endif |
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106 | #endif |
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107 | } |
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108 | return 0; |
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109 | } |
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110 | |
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111 | /* |
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112 | * do_IRQ handles all normal device IRQ's (the special |
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113 | * SMP cross-CPU interrupts have their own specific |
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114 | * handlers). |
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115 | */ |
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116 | asmlinkage unsigned int do_IRQ(struct pt_regs *regs) |
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117 | { |
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118 | /* high bit used in ret_from_ code */ |
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119 | unsigned irq = ~regs->orig_rax; |
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120 | |
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121 | if (unlikely(irq >= NR_IRQS)) { |
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122 | printk(KERN_EMERG "%s: cannot handle IRQ %d\n", |
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123 | __FUNCTION__, irq); |
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124 | BUG(); |
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125 | } |
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126 | |
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127 | exit_idle(); |
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128 | irq_enter(); |
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129 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
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130 | stack_overflow_check(regs); |
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131 | #endif |
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132 | __do_IRQ(irq, regs); |
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133 | irq_exit(); |
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134 | |
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135 | return 1; |
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136 | } |
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137 | |
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138 | #ifdef CONFIG_HOTPLUG_CPU |
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139 | void fixup_irqs(cpumask_t map) |
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140 | { |
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141 | unsigned int irq; |
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142 | static int warned; |
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143 | |
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144 | for (irq = 0; irq < NR_IRQS; irq++) { |
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145 | cpumask_t mask; |
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146 | if (irq == 2) |
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147 | continue; |
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148 | |
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149 | cpus_and(mask, irq_desc[irq].affinity, map); |
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150 | if (any_online_cpu(mask) == NR_CPUS) { |
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151 | printk("Breaking affinity for irq %i\n", irq); |
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152 | mask = map; |
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153 | } |
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154 | if (irq_desc[irq].chip->set_affinity) |
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155 | irq_desc[irq].chip->set_affinity(irq, mask); |
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156 | else if (irq_desc[irq].action && !(warned++)) |
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157 | printk("Cannot set affinity for irq %i\n", irq); |
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158 | } |
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159 | |
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160 | /* That doesn't seem sufficient. Give it 1ms. */ |
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161 | local_irq_enable(); |
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162 | mdelay(1); |
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163 | local_irq_disable(); |
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164 | } |
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165 | #endif |
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166 | |
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167 | extern void call_softirq(void); |
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168 | |
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169 | asmlinkage void do_softirq(void) |
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170 | { |
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171 | __u32 pending; |
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172 | unsigned long flags; |
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173 | |
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174 | if (in_interrupt()) |
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175 | return; |
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176 | |
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177 | local_irq_save(flags); |
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178 | pending = local_softirq_pending(); |
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179 | /* Switch to interrupt stack */ |
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180 | if (pending) { |
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181 | call_softirq(); |
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182 | WARN_ON_ONCE(softirq_count()); |
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183 | } |
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184 | local_irq_restore(flags); |
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185 | } |
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186 | EXPORT_SYMBOL(do_softirq); |
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187 | |
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188 | #ifndef CONFIG_X86_LOCAL_APIC |
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189 | /* |
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190 | * 'what should we do if we get a hw irq event on an illegal vector'. |
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191 | * each architecture has to answer this themselves. |
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192 | */ |
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193 | void ack_bad_irq(unsigned int irq) |
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194 | { |
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195 | printk("unexpected IRQ trap at vector %02x\n", irq); |
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196 | } |
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197 | #endif |
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