| 1 | .file "__umoddi3.s" |
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| 2 | |
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| 3 | // $FreeBSD: src/sys/libkern/ia64/__umoddi3.S,v 1.3 2003/02/11 20:15:11 schweikh Exp $ |
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| 4 | // |
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| 5 | // Copyright (c) 2000, Intel Corporation |
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| 6 | // All rights reserved. |
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| 7 | // |
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| 8 | // Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, |
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| 9 | // Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, |
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| 10 | // Intel Corporation. |
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| 11 | // |
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| 12 | // WARRANTY DISCLAIMER |
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| 13 | // |
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| 14 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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| 15 | // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| 16 | // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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| 17 | // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS |
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| 18 | // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
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| 19 | // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
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| 20 | // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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| 21 | // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY |
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| 22 | // OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING |
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| 23 | // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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| 24 | // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 25 | // |
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| 26 | // Intel Corporation is the author of this code, and requests that all |
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| 27 | // problem reports or change requests be submitted to it directly at |
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| 28 | // http://developer.intel.com/opensource. |
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| 29 | // |
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| 30 | |
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| 31 | .section .text |
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| 32 | |
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| 33 | // 64-bit unsigned integer remainder |
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| 34 | |
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| 35 | .proc __umoddi3# |
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| 36 | .align 32 |
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| 37 | .global __umoddi3# |
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| 38 | .align 32 |
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| 39 | |
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| 40 | __umoddi3: |
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| 41 | |
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| 42 | { .mii |
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| 43 | alloc r31=ar.pfs,3,0,0,0 |
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| 44 | nop.i 0 |
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| 45 | nop.i 0 |
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| 46 | } { .mmb |
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| 47 | |
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| 48 | // 64-BIT UNSIGNED INTEGER REMAINDER BEGINS HERE |
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| 49 | |
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| 50 | // general register used: |
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| 51 | // r32 - 64-bit unsigned integer dividend, called a below |
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| 52 | // r33 - 64-bit unsigned integer divisor, called b below |
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| 53 | // r8 - 64-bit unsigned integer result |
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| 54 | // floating-point registers used: f6, f7, f8, f9, f10, f11, f12 |
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| 55 | // predicate registers used: p6 |
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| 56 | |
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| 57 | setf.sig f12=r32 // holds a in integer form |
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| 58 | setf.sig f7=r33 |
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| 59 | nop.b 0;; |
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| 60 | } { .mfi |
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| 61 | // get 2s complement of b |
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| 62 | sub r33=r0,r33 |
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| 63 | fcvt.xuf.s1 f6=f12 |
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| 64 | nop.i 0 |
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| 65 | } { .mfi |
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| 66 | nop.m 0 |
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| 67 | fcvt.xuf.s1 f7=f7 |
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| 68 | nop.i 0;; |
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| 69 | } { .mfi |
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| 70 | nop.m 0 |
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| 71 | // Step (1) |
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| 72 | // y0 = 1 / b in f8 |
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| 73 | frcpa.s1 f8,p6=f6,f7 |
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| 74 | nop.i 0;; |
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| 75 | } { .mfi |
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| 76 | nop.m 0 |
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| 77 | // Step (2) |
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| 78 | // q0 = a * y0 in f10 |
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| 79 | (p6) fma.s1 f10=f6,f8,f0 |
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| 80 | nop.i 0 |
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| 81 | } { .mfi |
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| 82 | nop.m 0 |
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| 83 | // Step (3) |
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| 84 | // e0 = 1 - b * y0 in f9 |
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| 85 | (p6) fnma.s1 f9=f7,f8,f1 |
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| 86 | nop.i 0;; |
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| 87 | } { .mfi |
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| 88 | nop.m 0 |
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| 89 | // Step (4) |
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| 90 | // q1 = q0 + e0 * q0 in f10 |
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| 91 | (p6) fma.s1 f10=f9,f10,f10 |
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| 92 | nop.i 0 |
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| 93 | } { .mfi |
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| 94 | nop.m 0 |
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| 95 | // Step (5) |
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| 96 | // e1 = e0 * e0 in f11 |
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| 97 | (p6) fma.s1 f11=f9,f9,f0 |
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| 98 | nop.i 0;; |
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| 99 | } { .mfi |
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| 100 | nop.m 0 |
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| 101 | // Step (6) |
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| 102 | // y1 = y0 + e0 * y0 in f8 |
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| 103 | (p6) fma.s1 f8=f9,f8,f8 |
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| 104 | nop.i 0;; |
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| 105 | } { .mfi |
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| 106 | nop.m 0 |
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| 107 | // Step (7) |
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| 108 | // q2 = q1 + e1 * q1 in f9 |
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| 109 | (p6) fma.s1 f9=f11,f10,f10 |
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| 110 | nop.i 0;; |
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| 111 | } { .mfi |
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| 112 | nop.m 0 |
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| 113 | // Step (8) |
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| 114 | // y2 = y1 + e1 * y1 in f8 |
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| 115 | (p6) fma.s1 f8=f11,f8,f8 |
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| 116 | nop.i 0;; |
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| 117 | } { .mfi |
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| 118 | nop.m 0 |
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| 119 | // Step (9) |
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| 120 | // r2 = a - b * q2 in f10 |
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| 121 | (p6) fnma.s1 f10=f7,f9,f6 |
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| 122 | nop.i 0;; |
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| 123 | } { .mfi |
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| 124 | // f7=-b |
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| 125 | setf.sig f7=r33 |
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| 126 | // Step (10) |
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| 127 | // q3 = q2 + r2 * y2 in f8 |
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| 128 | (p6) fma.s1 f8=f10,f8,f9 |
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| 129 | nop.i 0;; |
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| 130 | } { .mfi |
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| 131 | nop.m 0 |
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| 132 | // (11) q = trunc(q3) |
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| 133 | fcvt.fxu.trunc.s1 f8=f8 |
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| 134 | nop.i 0;; |
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| 135 | } { .mfi |
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| 136 | nop.m 0 |
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| 137 | // (12) r = a + (-b) * q |
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| 138 | xma.l f8=f8,f7,f12 |
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| 139 | nop.i 0;; |
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| 140 | } { .mib |
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| 141 | getf.sig r8=f8 |
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| 142 | nop.i 0 |
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| 143 | nop.b 0 |
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| 144 | } |
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| 145 | |
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| 146 | // 64-BIT UNSIGNED INTEGER REMAINDER ENDS HERE |
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| 147 | |
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| 148 | { .mib |
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| 149 | nop.m 0 |
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| 150 | nop.i 0 |
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| 151 | br.ret.sptk b0;; |
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| 152 | } |
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| 153 | |
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| 154 | .endp __umoddi3 |
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